mcs1000 MosChip, mcs1000 Datasheet - Page 15

• Manufacturer Part Number: mcs1000
• Description: Security Processor
• Manufacturer: MosChip

Rev. 1.1
CPU Subsystem
The MCS1000 is based upon an ARM926EJ-S processor core. Additional detailed documentation on the
ARM926EJ-S core can be found at the ARM Website. There are differences between the 926 implemented in
the MCS1000 and the standard ARM926EJ-S.
In addition to the ARM9, the CPU Subsystem includes an ARM9 AMBA (AHB) to VCI Bus Bridge. The AHB to
VCI Bridge connects the ARM926EJ-S to the IPSec hardware.
MCS1000 Implementation of the ARM926EJ-S
The MCS1000 includes all functions in the standard ARM926EJ-S except for the Embedded Trace Macrocell
(ETM) port. The instruction set (ARMv5TEJ), Memory Management Unit, Caches, Jazelle™ processing
engine (Java), and JTAG interface remain unchanged.
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Memory Management Unit (MMU) - The ARM926EJ-S has an MMU and the MCS1000 has the
MMU implemented.
Caches (Instruction and Data) - The ARM926EJ-S has a 32KByte Instruction cache and a 32KByte
Data cache.
JTAG Interface - The ARM926EJ-S has a JTAG interface, but the EXTEST feature of the JTAG is not
implemented.
AHB2VCI64 (AHB to VCI Bus Bridge) - The link between the ARM926 core and the additional
hardware in the MCS1000 consists of two AHB to VCI Bridges. The bus interface on the ARM926EJ-
S is an AMBA (AHB) interface. The IPSec Hardware utilizes a Virtual Component Interface (VCI) bus.
The bridge enables communication between the ARM9 core and the rest of the system.
MCS1000
Security Processor
Page 15