mcf51em256 Freescale Semiconductor, Inc, mcf51em256 Datasheet - Page 42

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mcf51em256

Manufacturer Part Number
mcf51em256
Description
Microcontrollers Covers Mcf51em256 Mcf51em128
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Electrical Characteristics
42
4
5
6
All timing is shown with respect to 20% V
assumes slew rate control disabled and high drive strength enabled for SPI output pins.
Time to data active from high-impedance state.
Hold time to high-impedance state.
(CPOL = 1)
(OUTPUT)
(CPOL = 0)
(OUTPUT)
(OUTPUT)
(OUTPUT)
(INPUT)
NOTES:
(CPOL = 0)
(CPOL = 1)
(OUTPUT)
(OUTPUT)
(OUTPUT)
(OUTPUT)
MISO
MOSI
1. SS output mode (MODFEN = 1, SSOE = 1).
2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSB.
SCK
(INPUT)
SCK
NOTES:
SS
MISO
MOSI
SS
1
SCK
SCK
1. SS output mode (MODFEN = 1, SSOE = 1).
2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSB.
(1)
MCF51EM256 Series ColdFire Microcontroller Data Sheet, Rev.3
11
2
6
11
MSB IN
Preliminary—Subject to Change Without Notice
MSB OUT
Figure 19. SPI Master Timing (CPHA = 0)
Figure 20. SPI Master Timing (CPHA = 1)
2
4
5
6
2
7
MSB IN
MSB OUT
4
5
2
2
DD
2
(2)
7
5
4
and 70% V
(2)
5
4
BIT 6 . . . 1
BIT 6 . . . 1
11
DD
BIT 6 . . . 1
12
, unless noted; 100 pF load on all SPI pins. All timing
BIT 6 . . . 1
LSB IN
LSB OUT
LSB OUT
LSB IN
Freescale Semiconductor
12
3
3

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