mcf5208 Freescale Semiconductor, Inc, mcf5208 Datasheet - Page 26

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mcf5208

Manufacturer Part Number
mcf5208
Description
Mcf5208 Coldfire Microprocessor Data Sheet
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Electrical Characteristics
5.7
Table 11
26
NOTES:
1
2
3
4
5
6
7
8
9
10
11
Num
The maximum allowable input clock frequency when booting with the PLL enabled is 24 MHz. For higher input clock
frequencies, the processor must boot in LIMP mode to avoid violating the maximum allowable CPU frequency.
All internal registers retain data at 0 Hz.
This parameter is guaranteed by characterization before qualification rather than 100% tested.
Proper PC board layout procedures must be followed to achieve specifications.
This parameter is guaranteed by design rather than 100% tested.
This specification is the PLL lock time only and does not include oscillator start-up time.
C
Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum f
Measurements are made with the device powered by filtered supplies and clocked by a stable external clock signal.
Noise injected into the PLL circuitry via PLL V
the Cjitter percentage for a given interval.
Values are with frequency modulation disabled. If frequency modulation is enabled, jitter is the sum of Cjitter+Cmod.
Modulation percentage applies over an interval of 10μs, or equivalently the modulation rate is 100KHz.
12
13
14
17
18
19
Modulation range determined by hardware design.
PCB_EXTAL
lists processor bus input timings.
External Interface Timing Characteristics
Crystal capacitive load
Discrete load capacitance for XTAL
Discrete load capacitance for EXTAL
CLKOUT Period Jitter,
Frequency Modulation Range Limit
(f
VCO Frequency. f
sys
Peak-to-peak Jitter (Clock edge to clock edge)
Long Term Jitter
Max must not be exceeded)
All processor bus timings are synchronous; that is, input setup/hold and
output delay with respect to the rising edge of a reference clock. The
reference clock is the FB_CLK output.
All other timing relationships can be derived from these values. Timings
listed in
and C
PCB_XTAL
Table 11
vco
Table 10. PLL Electrical Characteristics (continued)
= (f
Characteristic
are the measured PCB stray capacitances on EXTAL and XTAL, respectively.
MCF5208 ColdFire
3, 4, 7, 8, 9
ref *
are shown in
PFD)/4
Measured at f
3, 10, 11
DD
®
, EV
Figure 14
Microprocessor Data Sheet, Rev. 1
DD
SYS
NOTE
, and V
Max
SS
and
and variation in crystal oscillator frequency increase
C
Figure
Symbol
C
L_EXTAL
C
C
L_XTAL
f
C
vco
jitter
mod
L
15.
Value
Min.
350
0.8
C
C
See crystal
C
PCB_EXTAL
C
Freescale Semiconductor
PCB_XTAL
S_EXTAL
2*C
S_XTAL
2*C
Value
Max.
spec
TBD
540
2.2
10
L
L
-
-
-
-
7
7
% f
% f
%f
MHz
Unit
pF
pF
sys/2
sys/2
sys/2
sys
.

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