mcf5272 Freescale Semiconductor, Inc, mcf5272 Datasheet - Page 341

• Manufacturer Part Number: mcf5272
• Description: Mcf5272 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

MOTOROLA
14.3.2 Internal Bus Interface
Because the QSPI module only operates in master mode, the master bit in the QSPI mode
register (QMR[MSTR]) must be set for the QSPI to function properly. The QSPI can
initiate serial transfers but cannot respond to transfers initiated by other QSPI masters.
14.4 Operation
The QSPI uses a dedicated 80-byte block of static RAM accessible both to the module and
the CPU to perform queued operations. The RAM is divided into three segments as follows:
RAM is organized so that 1 byte of command control data, 1 word of transmit data, and 1
word of receive data comprise 1 queue entry, 0x0–0xF.
The user initiates QSPI operation by loading a queue of commands in command RAM,
writing transmit data into transmit RAM, and then enabling the QSPI data transfer. The
QSPI executes the queued commands and sets the completion flag in the QSPI interrupt
register (QIR[SPIF]) to signal their completion. Optionally, QIR[SPIFE] can be enabled to
generate an interrupt.
The QSPI uses four queue pointers. The user can access three of them through fields in
QSPI wrap register (QWR):
The internal pointer is initialized to the same value as QWR[NEWQP]. During normal
operation, the following sequence repeats:
• 16 command control bytes (command RAM)
• 16 transmit data words, (transfer RAM)
• 16 receive data words (transfer RAM)
• The new queue pointer, QWR[NEWQP], points to the first command in the queue.
• An internal queue pointer points to the command currently being executed.
• The completed queue pointer, QWR[CPTQP], points to the last command executed.
• The end queue pointer, QWR[ENDQP], points to the final command in the queue.
1. The command pointed to by the internal pointer is executed.
2. The value in the internal pointer is copied into QWR[CPTQP].
3. The internal pointer is incremented.
QSPI Data Output (QSPI_Dout)
QSPI Data Input (QSPI_Din)
Serial Clock (QSPI_CLK)
Peripheral Chip Selects (QSPI_CS[3:0])
Table 14-1. QSPI Input and Output Signals and Functions
Chapter 14. Queued Serial Peripheral Interface (QSPI) Module
Signal Name
Hi-Z or Actively Driven
Configurable
N/A
Actively driven
Actively driven
Serial data output from QSPI
Serial data input to QSPI
Clock output from QSPI
Peripheral selects
Function
Operation
14-3