st52t430 STMicroelectronics, st52t430 Datasheet - Page 24

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st52t430

Manufacturer Part Number
st52t430
Description
8-bit Intelligent Controller Unit Icu Three Timer/pwms, Adc, Sci
Manufacturer
STMicroelectronics
Datasheet

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Table 3.2 EPROM Control Register
Figure 3.2 Eprom Programming Timing
24/88
RST_CONF
Memory Reading/Verify
INC_CONF
RST_ADD
Lock Status Reading
Memory Lock Status
Memory Unlock and
INC_ADD
ID CODE Reading/
ID CODE Writing
Memory Writing
PHASE
Reading/Verify
PA(0:7)
Memory Lock
OPERATION
Stand By
Verify
MEMORY UNLOCK
REGISTER VALUE
10
0
1
2
3
4
5
9
100nS
DATA
VALID
DATA
OUT
LOCATION ADDRESS =1
MEMORY WRITING
The operations above are managed by using the
internal 4-bit EPROM Control Register. The
reading phase is executed with V
the verify/Margin Mode phase needs V
12V 5%. The Blank Check must be a reading
operation with V
Table 3.2 illustrates EPROM Control Register
codes used to identify the operation running.
3.1 EPROM Programming Phase Procedure
The Programming mode is selected by applying
12V 5% voltage or 5V 5% voltage to the V
and setting the control signal as following:
RESET =Vss
TEST =Vss
If the V
performed.
RST_ADD, INC_ADD, RST_CONF, INC_CONF
and PHASE are the control signals used during the
Programming Mode.
PHASE, RST_CONF and RST_ADD signals are
active on level, the others are active on rising
edge.
PP
voltage is 5V 5% only reading may be
DATA
VALID
DATA
IN
PP
10 S
= 5V 5%.
DATA
OUT
MEMORY VERIFY
MARGIN MODE
PP
= 5V 5%, while
VALID
DATA
DATA
OUT
PP
PP
pin
=

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