st52t430 STMicroelectronics, st52t430 Datasheet - Page 17

• Manufacturer Part Number: st52t430
• Description: 8-bit Intelligent Controller Unit Icu Three Timer/pwms, Adc, Sci
• Manufacturer: STMicroelectronics

The STACK POINTER indicates the first level
available to store data. When a subroutine call or
interrupt request occurs, the content of the PC and
the current set of flags are stored into the level
located by the STACK POINTER.
When a interrupt return occurs (RETI instruction),
the data stored in the highest stack level is
restored back into the PC and current flags.
Instead, when a subroutine return occurs (RET
instruction) the data stored in the highest stack
level are restored in the PC not affecting the flags.
These operating modes are illustrated in Figure
2.4.
Note: The user must pay close attention to avoid
overwriting RAM locations where the STACK could
be stored .
2.3.2 Input Registers Bench.
The Input Registers (IR) bench consists of 20 8-bit
registers containing data or the status of the
peripherals.
Figure 2.4 Stack Operation
WHEN RETI OR RET
OCCURS
REG 252
REG 253
REG 254
REG 255
REG 0
REG 1
REG 2
REG 3
REG 4
REG 5
PROGRAM COUNTER
STACK LEVEL n
..........................
STACK LEVEL 2
STACK LEVEL 1
RAM
All the registers can be specified by using a
decimal address (for example, 0 identifies the first
register of the IR).
The assembler instruction:
LDRI RAM_Reg. IR_i
loads the value of the i-th IR in the RAM location
identified by the RAM_Reg address.
The first input register is dedicated to store the
value of the stack pointer. The next 8 registers
(ADC_OUT_0:7) of the IR are dedicated to the 8
converted values deriving from the ADC. The last
9 Input Registers contain data from the I/O ports
and PWM/Timers. The following table summarizes
the IR address and the relative peripherals. In
order to simplify the concept, a mnemonic name is
assigned to the registers. The same name is used
in VISUALSTUDIO
Stack
Pointer
INTERRUPT REQ.
WHEN CALL OR
OCCURS
®
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