adns-6030 Avago Technologies, adns-6030 Datasheet - Page 18

• Manufacturer Part Number: adns-6030
• Description: Low Power Laser Mouse Bundles - Agilent Hewlett-packard
• Manufacturer: Avago Technologies

Figure 18. Timing between two write commands
Figure 19. Timing between write and read commands
Figure 20. Timing between read and either write or subsequent read commands
Required timing between Read and
Write Commands
There are minimum timing
requirements between read
and write commands on the
serial port.
If the rising edge of the SCLK
for the last data bit of the
second write command occurs
before the required delay
(t
command may not complete
correctly.
If the rising edge of SCLK for
the last address bit of the read
command occurs before the
required delay (t
write command may not
complete correctly.
During a read operation SCLK
should be delayed at least
t
data bit to ensure that the
ADNS-6030 has time to
prepare the requested data.
SCLK
18
SCLK
SRAD
SWW
), then the first write
after the last address
Address
Address
SWR
Write Operation
), the
Data
t
SRAD
The falling edge of SCLK for
the first address bit of either
the read or write command
must be at least t
after the last SCLK rising edge
of the last data bit of the
previous read operation.
Burst Mode Operation
Burst mode is a special serial
port operation mode that may
be used to reduce the serial
transaction time for a motion
read. The speed improvement
is achieved by continuous data
clocking to or from multiple
registers without the need to
specify the register address,
and by not requiring the
normal delay period between
data bytes.
Burst mode is activated by
reading the Motion_Burst
register. The ADNS-6030 will
respond with the contents of
the Motion, Delta_X, Delta_Y,
Read Operation
Address
SRR
t
SWW
Write Operation
or t
SRW
Data
Data
SQUAL, Shutter_Upper,
Shutter_Lower and
Maximum_Pixel registers in
that order. The burst
transaction can be terminated
anywhere in the sequence after
the Delta_X value by bringing
the NCS pin high. After
sending the register address,
the micro-controller must wait
t
data. All data bits can be
read with no delay between
bytes by driving SCLK at the
normal rate. The data are
latched into the output buffer
after the last address bit is
received. After the burst
transmission is complete, the
micro-controller must raise the
NCS line for at least t
terminate burst mode. The
serial port is not available for
use until it is reset with NCS,
even for a second burst
transmission.
SRAD
t
SRW
& t
Write Operation
SRR
and then begin reading
Next Read or
Address
BEXIT
to