ad5392bst-u2 Analog Devices, Inc., ad5392bst-u2 Datasheet - Page 27

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ad5392bst-u2

Manufacturer Part Number
ad5392bst-u2
Description
8-/16-channel, 3 V/5 V, Serial Input, Single- Supply, 12-/14-bit Voltage Output
Manufacturer
Analog Devices, Inc.
Datasheet
I
There are three specific modes in which data can be written to
the AD539x family of DACs.
4-BYTE MODE
When writing to the AD539x DACs, begin with an address byte
(R/ W = 0), after which the DAC acknowledges that it is prepared
to receive data by pulling SDA low. The address byte is followed
by the pointer byte. This addresses the specific channel in the
DAC to be addressed and is also acknowledged by the DAC.
2
C WRITE OPERATION
SCL
SDA
SCL
SDA
CONDITION
MASTER
START
BY
REG1
1
REG0
0
1
MSB
MOST SIGNIFICANT DATA BYTE
ADDRESS BYTE
0
1
AD1
AD0
Figure 33. 4-Byte Mode I
LSB
R/W
CONVERTER
CONVERTER
Rev. B | Page 27 of 44
ACK
BY
ACK
BY
MSB
0
MSB
2
C Write Operation
Address Bits A3 to A0 address all channels on the AD5390/
AD5391. Address Bits A2 to A0 address all channels on the
AD5392. Address Bit A3 is a zero on the AD5392. Two bytes of
data are then written to the DAC, as shown in Figure 33. A
STOP condition follows. This lets the user update a single
channel within the AD539x at any time and requires four bytes
of data to be transferred from the master.
0
0
LEAST SIGNIFICANT DATA BYTE
POINTER BYTE
0
A3
AD5390/AD5391/AD5392
A2
A1
A0
CONVERTER
CONVERTER
LSB
ACK
ACK
BY
BY
CONDITION
MASTER
STOP
BY

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