6n134-883b-300 Avago Technologies, 6n134-883b-300 Datasheet - Page 9

• Manufacturer Part Number: 6n134-883b-300
• Description: Hermetically Sealed, High Speed, High Cmr, Logic Gate Optocouplers
• Manufacturer: Avago Technologies

Notes:
10. No external pull up is required for a high logic state on the enable input.
11. The t
12. The t
13. Standard parts receive 100% testing at 25 C (Subgroups 1 and 9). SMD and 883B parts receive 100% testing at 25, 125, and -55 C
14. Parameters are tested as part of device initial characterization and after design and process changes. Parameters are guaranteed to limits
15. Not required for 6N134, 6N134/883B, 8102801, HCPL-268K and 5962-9800101 types.
16. Required for 6N134, 6N134/883B, 8102801, HCPL-268K and 5962-9800101 types.
17. Not required for HCPL-5650, HCPL-5651 and 8102805 types.
18. Required for HCPL-5650, HCPL-5651 and 8102805 types only.
Figure 1. High Level Output Current vs.
Temperature.
9
1. Each channel.
2. All devices are considered two-terminal devices; I
3. Measured between each input pair shorted together and all output connections for that channel shorted together.
4. Measured between adjacent input pairs shorted together for each multichannel device.
5. t
6. The HCPL-6630, HCPL-6631, and HCPL-663K dual channel parts function as two independent single channel units. Use the single channel
7. CM
8. This is a momentary withstand test, not an operating condition.
9. It is essential that a bypass capacitor (0.01 to 0.1 F, ceramic) be connected from V
leads or terminals shorted together.
of the output pulse. The t
on the trailing edge of the output pulse.
parameter limits for each channel.
(V
high state (V
of this external capacitor and the isolator connections should not exceed 20 mm.
on the trailing edge of the output pulse.
on the leading edge of the output pulse.
(Subgroups 1 and 9, 2 and 10, 3 and 11, respectively).
specified for all lots not specifically tested.
PHL
O
L
< 0.8 V). CM
propagation delay is measured from the 50% point on the leading edge of the input pulse to the 1.5 V point on the leading edge
is the maximum rate of rise of the common mode voltage that can be sustained with the output voltage in the logic low state
ELH
EHL
enable propagation delay is measured from the 1.5 V point on the trailing edge of the enable input pulse to the 1.5 V point
enable propagation delay is measured from the 1.5 V point on the leading edge of the enable input pulse to the 1.5 V point
O
> 2.0 V).
H
is the maximum rate of fall of the common mode voltage that can be sustained with the output voltage in the logic
PLH
propagation delay is measured from the 50% point on the trailing edge of the input pulse to the 1.5 V point
Figure 2. Input-Output Characteristics.
I-O
is measured between all input leads or terminals shorted together and all output
CC
to ground. Total lead length between both ends
Figure 3. Input Diode Forward
Characteristic.