isl3874 Intersil Corporation, isl3874 Datasheet - Page 19

• Manufacturer Part Number: isl3874
• Description: Wireless Lan Integrated Medium Access Controller With Baseband Processor With Mini-pci
• Manufacturer: Intersil Corporation

Table 12 summarizes the effect per pin. Table 13 provides the
MD15 and MD14 bit values required to allow the ISL3874 to
use the external Serial EEPROM bootup option.
Baseband Processor
The Baseband Processor operation is controlled by the
ISL3874 firmware. Detailed information on programming the
Baseband Processor can be obtain by contacting the
factory. Internal registers and their function are provided as
reference material in this data sheet.
BBP Packet Reception
The receive demodulator scrutinizes I and Q for packet activity.
When a packet arrives at a valid signal level the demodulator
acquires and tracks the incoming signal. It then sifts through the
demodulator data for the Start Frame Delimiter (SFD). After
SFD is detected, The BBP picks off the needed header fields
from the real-time demodulated bitstream.
Assuming all is well with the header, the BBP decodes the
signal field in the header and switches to the appropriate
data rate. If the signal field is not recognized, or the CRC16
NOTE:
2. The operating frequency of the serial port is 400kHz with a voltage of 3.3V.
15:14
BITS
7:0
MD15
13
12
11
10
9
8
0
0
1
NVtype[1:0]
PCIGRst
Mem16
ROMds
NAME
StrIdle
4Wire
Spare
NVds
MD14
0
1
X
DEFAULT
0 x 00F
AT45DB011
24C08 (Note 2)
None
3
0
0
1
1
1
0
DEVICE TYPE
19
TABLE 12. INITIALIZATION STRAPPING OPTIONS ON MBUS DATA PINS
Indicates type of serial NV memory to be read by initialization firmware in on-chip ROM.
Up to 8 NV device types can be encoded with (StrIdle or NVtype). If StrIdle = 0, NV memory holds a firmware
image, and NVtype identifies 1 of 4 “large” (. = 128kb) types. If StrIdle = 1, the NV memory just holds the CIS,
and NVtype identifies 1 of 4 “small” (< = 8kb) types.
Connects GRESET to HRESET internally when = 1.
Use 4-wire interface to SRAM (CS-, OE-, WEH-, WEL-) as on HFA3841 and appropriate when using the
HFA3842 with x8 SRAMs. When = 0 selects 5-wire interface for use with x16 SRAM (CS-, OE-, WE-, UBE-,
LBE-).
Start idle (wait for download from PC Card host interface).
RAM and NV space at startup is x 16. When = 0 RAM and NV space at startup is x 8. If starting from off-chip
NV memory this setting must indicate the width of the startup Flash Memory. During initialization, firmware
can set separate widths or RAM and NV space in the Memory Control Register.
Disable mapping of off-chip control store to NV space (hence map off-chip control store to RAM space). When
= 0 off-chip control store is mapped to NV memory.
Disable on-chip control store ROM. When = 0 enable on-chip control store ROM.
Not assigned.
TABLE 13. SERIAL EEPROM SELECTION
Large Serial Device used to transfer CIS information firmware to SRAM.
Small Serial Device which contains only CIS information. MAC goes idle after loading CIS data
and waits on the Host for further instructions.
Modes not supported in Firmware at this time. Consult factory for additional device types added.
ISL3874
is in error, the demodulator will return to acquisition mode
looking for another packet. If all is well with the header, and
after the demodulator has switched to the appropriate data
rate, then the demodulator will continue to provide data to
the MAC in the ISL3874 indefinitely. The MAC terminates
reception at the end of a packet.
RX I/Q A/D Interface
The PRISM baseband processor chip (ISL3874) includes
two 6-bit Analog to Digital converters (A/Ds) that sample the
balanced differential analog input from the IF down converter
device (HFA3783). The I/Q A/D clock, samples at twice the
chip rate with a nominal sampling rate of 22MHz.
The interface specifications for the I and Q A/Ds are listed in
Table 14. The ISL3874 is designed to be DC coupled to the
HFA3783.
The voltages applied to pin 16, V
the references for the internal I and Q A/D converters. In
addition, For a nominal I/Q input of 400mV
suggested V
FUNCTION
REF
NOTES
voltage is 1.2V.
REF
and pin 21, I
P-P
, the
REF
set