ad6472 Analog Devices, Inc., ad6472 Datasheet - Page 8

• Manufacturer Part Number: ad6472
• Description: 2 Pair/1 Pair Etsi Compatible Hdsl Analog Front End
• Manufacturer: Analog Devices, Inc.

AD6472
PCB Layout Recommendations
Analog and Digital
Ground Planes
Power Supply
Capacitors
SFRAME
SDATA
SCLK
Separate the analog and digital grounds.
Use a single 35 to 50 mil wide trace un-
der the device to connect the two ground
planes. Connect the IC ground pins
directly to the respective ground planes.
Use one 0.1 F capacitor for each IC de-
coupling power supply connection in addi-
tion to capacitance shown in schematic.
THE FIRST 7 BITS OF THE 16-BIT SERIAL WORD ARE THE INPUT TO THE TR DAC, MSB FIRST. THE NUMBER
SYSTEM IS TWOS COMPLEMENT, AS FOLLOWS:
1. THE RISING EDGE OF SFRAME CAN OCCUR ANYWHERE. SFRAME MUST BE AT LEAST ONE CLOCK CYCLE WIDE.
2. SFRAME FALLING EDGE MUST OCCUR BEFORE THE SCLK RISING EDGE THAT CAPTURED THE SERIAL LSB.
MSB
D6
THIS ENSURES CORRECT LOADING INTO THE DAC.
t
SU
t
D5
H
12ns
10ns
1
D4
Figure 6. Timing Recovery DAC Converter Timing
D3
D2
D1
OUTPUT
FULL SCALE
MID-SCALE
MINIMUM
D0
X
–8–
1111111
1000000
0000000
X
WORD
X
0.041 (1.03)
0.029 (0.73)
0.004 (0.10)
0.010 (0.25)
SEATING
PLANE
X
MAX
VOLTAGE
MIN
4.5
2.5
0.5
80-Lead Metric Plastic Quad Flatpack
0.134 (3.40)
X
0.120 (3.05)
0.100 (2.55)
MAX
Dimensions shown in inches and (mm).
X
OUTLINE DIMENSIONS
20
X
1
80
21
0.026 (0.65)
X
S-80A
2
0.486 (12.35) BSC
BSC
0.555 (14.10)
0.547 (13.90)
0.690 (17.45)
0.667 (16.95)
(PINS DOWN)
TOP VIEW
X
0.015 (0.38)
0.009 (0.22)
MSB
D6
D5
40
61
60
41
D4
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