ad6472 Analog Devices, Inc., ad6472 Datasheet - Page 4

• Manufacturer Part Number: ad6472
• Description: 2 Pair/1 Pair Etsi Compatible Hdsl Analog Front End
• Manufacturer: Analog Devices, Inc.

AD6472
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Mnemonic
+5 V_DVDD
DGND
MODE_SEL0
MODE_SEL1
AA_FLTR_BP
PWRDN
NC
TX_GAIN_SEL
TX_DRVR_BP
ADC_BUF_BP
TX_LPF_BP
TSTGND
LOOPBACK
DGND
+3 V_DVDD
TX_DATA
TX_SYNC
TX_CLK
+5 V_DVDD
DGND
NC
IOUT_SET
NC
CAP_B
CAP_C
TX_IOUT_A
TX_IOUT_B
AGND
AVDD
TX_LPF_IN_B
TX_LPF_IN_A
TX_LPF_OUT_B Differential Output from Transmit
TX_LPF_OUT_A Differential Output from Transmit
AVDD
DRVR_OUT_B
DRVR_OUT_A
AGND
HYB_IN2_B
HYB_IN2_A
HYB_IN1_B
Bit Rate—Filter Corner Select.
Bit Rate—Filter Corner Select.
Transmit Data Input.
TXDAC Complementary Current
TXDAC Complementary Current
Hybrid Noninverting Input.
Hybrid Noninverting Input.
Description
+5 V Digital Supply.
Digital Ground.
Antialiasing Filter Bypass.
Power-Down Active Low.
No Connect.
Transmit Attenuation (6 dB) Select.
Transmit Driver Bypass.
ADC Buffer Bypass.
Transmit Filter Bypass.
Factory test pin. Connect to DGND.
Loopback Select.
Digital Ground.
+3.3 V Digital Supply.
Transmit Data Frame Sync Input.
Transmit Clock Input.
+5 V Digital Supply.
Digital Ground.
No Connect.
DAC Output Current Full Scale
(With Resistor to Ground).
No Connect.
Decoupling Pin for Internal Node.
Decoupling Pin for Internal Node.
Output.
Output.
Analog Ground.
+5 V Analog Supply.
Differential Input to LPF.
Differential Input to LPF.
(If Driver Bypassed).
(If Driver Bypassed).
+5 V Analog Supply.
Differential Driver Output.
Differential Driver Output.
Analog Ground.
Hybrid Inverting Input.
PIN CONFIGURATIONS
–4–
Pin
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
Mnemonic
HYB_IN1_A
AGND
AVDD
PGA_GC2
PGA_GC1
PGA_GC0
AA_FLTR_OUTB Differential Output of the
AA_FLTR_OUTA Differential Output of the
ADC_INB
ADC_INA
REF_COM
CAP_TOP
CAP_BOT
VREF
CM_LVL
AGND
AVDD
DGND
+5 V_ DVDD
NC
+3 V_ DVDD
TR_DAC_OUT
SDATA
SFRAME
SCLK
RX0
RX1
RX2
RX3
RX4
RX5
DGND
+3 V_DVDD
RX6
RX7
RX8
RX9
RX10
RX11
RXCLK
Description
Hybrid Inverting Input.
Analog Ground.
+5 V Analog Supply.
PGA Gain Select Bits.
PGA Gain Select Bits.
PGA Gain Select Bits.
Antialiasing Filter.
Antialiasing Filter.
Differential Input to the ADC.
Differential Input to the ADC.
Reference Common.
Decoupling Pin for ADC Reference.
Decoupling Pin for ADC Reference.
External Voltage Reference.
Common-Mode Level.
(1/2 Supply Voltage, Nominally.)
Analog Ground.
+5 V Analog Supply.
Digital Ground.
+5 V Digital Supply.
No Connect.
+3 V Digital Supply.
Timing Recovery DAC Output
Voltage.
Serial Data Input to Timing Recov-
ery DAC.
Frame Sync for Timing Recovery.
Clock for Timing Recovery DAC.
Serial Data.
Digital Output Data.
Digital Output Data.
Digital Output Data.
Digital Output Data.
Digital Output Data.
Digital Output Data.
Digital Ground.
+3 V Digital Supply.
Digital Output Data.
Digital Output Data.
Digital Output Data.
Digital Output Data.
Digital Output Data.
Digital Output Data.
Clock Input for ADC Data.
REV. 0