sm5838a Nippon Precision Circuits Inc, (NPC), sm5838a Datasheet - Page 8

• Manufacturer Part Number: sm5838a
• Description: 5120 ? 8-bit Synchronous Fifo
• Manufacturer: Nippon Precision Circuits Inc, (NPC)

Output Enable
When OE is HIGH, DOUT0 to DOUT7 become high impedance. Note that because RE operation is indepen-
dent of OE operation, the read address pointer can be incremented even when the outputs are high impedance.
TYPICAL APPLICATIONS
Note that at power-ON, the write address pointer and read address pointer positions are undefined. Accord-
ingly, RW and RR reset cycles are required.
1H Delay Line
A 5120-word delay line can be realized by performing simultaneous write reset and read reset at power-ON.
An n-word delay line (21 to 5210-word) can be realized using any of the following methods.
1. Perform reset in sync with desired delay length.
2. Stagger RW and RR timing to desired delay length.
3. Manipulate the write or read address pointer using WE or RE to disable incrementing to maintain sync
1H (5120-word) delay line timing
DOUT
CLK
DOUT
DIN
RW
with desired delay length.
RR
CLK
OE
(n-1)
t
RS
t
RH
t
0 cycle
t
CKW
OEH
t
A
t
n cycle
DS
0
t
DH
1 cycle
t
t
CKW
OES
(n)
1
5120 cycle
2 cycle
1H
t
OZ
2
n+1 cycle
5118
SM5838AS
5119
cycle
Hi-Z
5119
t
OEH
n+2 cycle
t
5120+0
A
cycle
t
0
0
OES
t
OH
5120+1
RR="H" ,RE="L"
cycle
t
1
1
ZO
t
A
5120+2
2H
cycle
SEIKO NPC CORPORATION —8
WE="L" , RE="L" , OE="L"
n+3 cycle
2
2
5120+3
cycle
(n+3)
3
3