sm5838a Nippon Precision Circuits Inc, (NPC), sm5838a Datasheet - Page 12

• Manufacturer Part Number: sm5838a
• Description: 5120 ? 8-bit Synchronous Fifo
• Manufacturer: Nippon Precision Circuits Inc, (NPC)

1/2n data reduction (n × n pixel reduction)
Screen resolution reduction, or 2 × 2 pixel reduction, can be realized by combining both 1/2 data reduction and
1/2 line extraction schemes. Furthermore, n × n pixel reduction (for integer n) can be realized by changing the
WE and RE disable intervals and the RW and RR reset timing.
Also, if the same data is repeatedly read out in place of other data that has been discarded, the screen resolution
can be reduced without changing the data rate to realize a mosaic filter function.
2 × 2 pixel reduction (1/4 reduction)
2 × 2 pixel reduction (mosaic)
DOUT
DOUT
2 pixcels
CLK
CLK
DIN
2 pixcels
DIN
RW
WE
WE
RW
OE
RR
RE
OE
RR
RE
0 1 2 3 4 5
0 1 2 3 4 5
0 1 2 3 4 5
0 1 2 3 4 5
0
Invalid Invalid
Valid
Valid
0
2 pixcels
2 pixcels
2
nH-1H
nH-1H
nH-2H
Invalid
4
2
6
909
909
908*
909
909
nH-2H
0 1
0 1
*Output date 902 to 908 forms the preceding 1H data.
0
2 3 4 5
2 3 4 5
2
nH-2H
nH
nH
4
SM5838AS
908
908
909
909
0 1 2 3 4 5
0 1 2 3 4 5
0
0
2
nH+1H
nH+1H
nH
4
2
6
908*
909
909
nH
SEIKO NPC CORPORATION —12
0 1
0 1
0
2 3 4 5
2 3 4 5
2
nH+2H
nH+2H
nH
4
908
908
909
909