st72321j STMicroelectronics, st72321j Datasheet - Page 52

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st72321j

Manufacturer Part Number
st72321j
Description
8-bit Mcu With Nested Interrupts, Flash, 10-bit Adc, 5 Timers, Spi, Sci, I2c Interface
Manufacturer
STMicroelectronics
Datasheet
ST72321J
WATCHDOG TIMER (Cont’d)
Figure 32. Exact Timeout Duration (t
52/179
WHERE:
t
t
t
CNT = Value of T[5:0] bits in the WDGCR register (6 bits)
MSB and LSB are values from the table below depending on the timebase selected by the TB[1:0] bits
in the MCCSR register
To calculate the minimum Watchdog Timeout (t
IF
To calculate the maximum Watchdog Timeout (t
IF
Note: In the above formulae, division results must be rounded down to the next integer value.
Example:
With 2ms timeout selected in MCCSR register
min0
max0
OSC2
(MCCSR Reg.)
WDGCR Register (Hex.)
Value of T[5:0] Bits in
CNT
CNT
TB1 Bit
= (LSB + 128) x 64 x t
= 16384 x t
= 125ns if f
0
0
1
1
<
MSB
-------------
MSB
-------------
00
3F
4
4
(MCCSR Reg.)
OSC2
OSC2
TB0 Bit
THEN
ELSE
THEN
ELSE
0
1
0
1
=8 MHz
Min. Watchdog
t max
Timeout (ms)
t min
OSC2
t ma x
t m in
1.496
t
Selected MCCSR
128
min
=
=
=
=
t min0
t max0
Timebase
t min0
t max0
10ms
25ms
2ms
4ms
min
+
+
+
+
and t
16384
16384
16384
16384
Max. Watchdog
Timeout (ms)
max
128.552
2.048
t
max
MSB
CNT
)
min
C NT
CN T
max
20
49
C NT
4
8
):
):
t osc2
t osc2
LSB
4 CNT
---------------- -
59
53
MSB
4CNT
---------------- -
35
54
MSB
+
+
192
192
+
+
LS B
LSB
64
64
4CNT
---------------- -
MSB
4CNT
---------------- -
MSB
t osc2
t osc2

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