st10f269z1 STMicroelectronics, st10f269z1 Datasheet - Page 48

• Manufacturer Part Number: st10f269z1
• Description: St10f269 16-bit Mcu With Mac Unit, 256k Byte Flash Memory And 12k Byte Ram
• Manufacturer: STMicroelectronics

8 - INTERRUPT SYSTEM
xxIC (yyyyh / zzh)
8.4 - Exception and Error Traps List
Table 8 shows all of the possible exceptions or error conditions that can arise during run-time:
Table 8 : Trap Priorities
*
48/184
Reset Functions:
Class A Hardware Traps:
Class B Hardware Traps:
Reserved
Software Traps
15
- All the class B traps have the same trap number (and vector) and the same lower priority compare to the class A traps and to the resets.
- Each class A traps has a dedicated trap number (and vector). They are prioritized in the second priority level.
- The resets have the highest priority level and the same trap number.
- The PSW.ILVL CPU priority is forced to the highest level (15) when these exceptions are serviced.
-
GLVL
ILVL
xxIE
xxIR
Bit
14
-
Exception Condition
Hardware Reset
Software Reset
Watchdog Timer Overflow
Non-Maskable Interrupt
Stack Overflow
Stack Underflow
Undefined Opcode
Protected Instruction Fault
Illegal word Operand Access
Illegal Instruction Access
Illegal External Bus Access
TRAP Instruction
13
-
Group Level
Defines the internal order for simultaneous requests of the same priority.
3: Highest group priority
0: Lowest group priority
Interrupt Priority Level
Defines the priority level for the arbitration of requests.
Fh: Highest priority level
0h: Lowest priority level
Interrupt Enable Control Bit (individually enables/disables a specific source)
‘0’: Interrupt Request is disabled
‘1’: Interrupt Request is enabled
Interrupt Request Flag
‘0’: No request pending
‘1’: This source has raised an interrupt request
12
-
11
-
10
-
UNDOPC
PRTFLT
ILLBUS
STKOF
STKUF
ILLOPA
ILLINA
9
-
Trap
Flag
NMI
SFR Area
8
-
STOTRAP
STUTRAP
NMITRAP
RESET
RESET
RESET
BTRAP
BTRAP
BTRAP
BTRAP
BTRAP
xxIR
Vector
RW
Trap
7
Function
xxIE
RW
6
[002Ch - 003Ch]
0000h – 01FCh
in steps of 4h
Location
00’0000h
00’0000h
00’0000h
00’0008h
00’0010h
00’0018h
00’0028h
00’0028h
00’0028h
00’0028h
00’0028h
5
Vector
Any
4
ILVL
RW
3
[0Bh - 0Fh]
[00h - 7Fh]
Number
Reset Value: - - 00h
Trap
0Ah
0Ah
0Ah
0Ah
0Ah
00h
00h
00h
02h
04h
06h
Any
2
ST10F269
1
GLVL
Priority
Current
Priority
RW
Trap*
CPU
III
III
III
II
II
II
I
I
I
I
I
0