sc28l198 NXP Semiconductors, sc28l198 Datasheet - Page 47

• Manufacturer Part Number: sc28l198
• Description: Octal Uart For 3.3v And 5v Supply Voltage
• Manufacturer: NXP Semiconductors

1. Timing is illustrated and referenced with respect to W–RN and CEN inputs. Internal read and write activities are controlled by the Sclk as it
2. The minimum time before the rising edge of the next C2 time to stop the next bus cycle. CEN must return high after midpoint of C4 time and
3. Delay is from CEN high in Async mode to IRQN inactive, from end of C4 to IRQN inactive in Sync mode.
4. The minimum frequency values are not tested, but are guaranteed by design.
5. 1MHz specification is for crystal operation.
Philips Semiconductors
AC ELECTRICAL CHARACTERISTICS FOR COMMERCIAL AND INDUSTRIAL (3.3 V)
NOTES:
2006 Aug 10
Fsclk
T/RFsclk
X1 / X2 Communication Crystal Clock
Fx1
X1 L / H
T/RFx1
Counter/Timer Baud Rate Clock (External Clock Input)
FC/T
TC/TLH
TC/TO
DACKN Timing
DAK
DAK
DAK
I/O PORT External Clock
T
G
GPO
SYMBOL
SYMBOL
GPIRTX
Octal UART for 3.3 V and 5 V supply voltage
OUT
generates the several “C” timing as shown in the timing diagrams.
before the C2 time of the next cycle.
5
DLY
DLYA
DLY
4
TDD
Timing
FIGURE
FIGURE
Sclk frequency
Sclk rise/fall time (0.8 to 2.0Volts)
X1 clock frequency
X1 Low / High time
X1 Rise / Fall time
Clock frequency
C/T high and low time
Delay C/T clock external to output pin
DACK low from Sclk C4 rising edge
DACK high from CEN high (ASYNC)
DACK high from C4 end rising edge (SYNC)
GPI to Rx/Tx clock out
RxD setup to I/OP rising edge 1X mode
I/OP falling edge to TxD out 1X mode
GPO valid after write to GPOR
PARAMETER
PARAMETER
47
0.1
1
80
0
20
20
MIN
3.6864
52
15
48
18
18
20
50
2
32
100
LIMITS
TYP
(Continued)
20
5
4
10
8
110
30
30
30
80
70
MAX
SC28L198
Product data sheet
MHz
ns
MHz
ns
ns
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
UNIT
UNIT