74ABT16821ADL,518 NXP Semiconductors, 74ABT16821ADL,518 Datasheet - Page 3

• Manufacturer Part Number: 74ABT16821ADL,518
• Description: IC BUS INTRFC F/F POS 56SSOP
• Manufacturer: NXP Semiconductors
• Series: 74ABTr
• Type: D-Type Busr

Specifications of 74ABT16821ADL,518

• Output Type: Tri-State Non Inverted
• Package / Case: 56-SSOP
• Function: Standard
• Number Of Elements: 2
• Number Of Bits Per Element: 10
• Frequency - Clock: 250MHz
• Delay Time - Propagation: 2.4ns
• Trigger Type: Positive Edge
• Current - Output High, Low: 32mA, 64mA
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Number Of Circuits: 2
• Logic Family: ABT
• Logic Type: D-Type Edge Triggered Flip-Flop
• Polarity: Non-Inverting
• Input Type: Single-Ended
• Propagation Delay Time: 2.4 ns
• High Level Output Current: - 32 mA
• Low Level Output Current: 64 mA
• Supply Voltage (max): 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Supply Voltage (min): 4.5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 74ABT16821ADL-T; 74ABT16821ADL-T; 935196760518

Philips Semiconductors
PIN CONFIGURATION
LOGIC SYMBOL
2002 Dec 13
20-bit bus-interface D-type flip-flop;
positive-edge trigger (3-State)
56
29
28
1
1CP
1OE
2CP
2OE
1D0 1D1 1D2 1D3 1D4 1D5 1D6 1D7
1Q0 1Q1 1Q2 1Q3 1Q4 1Q5 1Q6 1Q7
2D0 2D1 2D2 2D3 2D4 2D5 2D6 2D7
2Q0 2Q1 2Q2 2Q3 2Q4 2Q5 2Q6 2Q7
55
42
15
2
54
41
16
GND
GND
GND
GND
1OE
2OE
3
1Q0
1Q1
1Q2
1Q3
V
1Q4
1Q5
1Q6
1Q7
1Q8
1Q9
2Q0
2Q1
2Q2
2Q3
2Q4
2Q5
V
2Q6
2Q7
2Q8
2Q9
CC
CC
52
40
17
5
10
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
11
1
2
3
4
5
6
7
8
9
51
38
19
6
49
37
20
8
48
36
21
9
SH00001
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
47
10
34
23
1CP
1D0
1D1
GND
1D2
1D3
V
1D4
1D5
1D6
GND
1D7
1D8
1D9
2D0
2D1
2D2
GND
2D3
2D4
2D5
V
2D6
2D7
GND
2D8
2D9
2CP
CC
CC
45
12
33
24
1Q8 1Q9
2Q8 2Q9
1D8 1D9
2D8 2D9
44
13
31
26
SH00002
43
14
30
27
3
LOGIC SYMBOL (IEEE/IEC)
FUNCTION TABLE
H = High voltage level
h = High voltage level one set-up time prior to the LOW-to-HIGH
L = Low voltage level
l
NC= No change
X = Don’t care
Z = High impedance “off” state
nOE
H
H
L
L
L
= Low voltage level one set-up time prior to the LOW-to-HIGH
= LOW-to-HIGH clock transition
= Not a LOW-to-HIGH clock transition
INPUTS
clock transition
clock transition
1OE
2OE
1CP
2CP
1D0
1D1
1D2
1D3
1D4
1D5
1D6
1D7
1D8
1D9
2D0
2D1
2D2
2D3
2D4
2D5
2D6
2D7
2D8
2D9
nCP
56
28
29
55
54
52
51
49
48
47
45
44
43
42
41
40
38
37
36
34
33
31
30
nDx
1
Dn
X
X
h
l
INTERNAL
INTERNAL
REGISTER
EN2
EN4
1D
3D
NC
NC
Dn
H
L
C1
C3
74ABTH16821A
nQ0 – nQ9
OUTPUTS
2
4
74ABT16821A
NC
H
L
Z
Z
10
12
13
14
15
16
17
19
20
21
23
24
26
27
Load and read
2
3
5
6
8
9
OPERATING
OPERATING
SH00003
Product data
register
Disable
outputs
MODE
1Q0
1Q1
1Q2
1Q3
1Q4
1Q5
1Q6
1Q7
1Q8
1Q9
2Q0
2Q1
2Q2
2Q3
2Q4
2Q5
2Q6
2Q7
2Q8
2Q9
Hold