74ABT16821ADL,518 NXP Semiconductors, 74ABT16821ADL,518 Datasheet - Page 2

• Manufacturer Part Number: 74ABT16821ADL,518
• Description: IC BUS INTRFC F/F POS 56SSOP
• Manufacturer: NXP Semiconductors
• Series: 74ABTr
• Type: D-Type Busr

Specifications of 74ABT16821ADL,518

• Output Type: Tri-State Non Inverted
• Package / Case: 56-SSOP
• Function: Standard
• Number Of Elements: 2
• Number Of Bits Per Element: 10
• Frequency - Clock: 250MHz
• Delay Time - Propagation: 2.4ns
• Trigger Type: Positive Edge
• Current - Output High, Low: 32mA, 64mA
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Number Of Circuits: 2
• Logic Family: ABT
• Logic Type: D-Type Edge Triggered Flip-Flop
• Polarity: Non-Inverting
• Input Type: Single-Ended
• Propagation Delay Time: 2.4 ns
• High Level Output Current: - 32 mA
• Low Level Output Current: 64 mA
• Supply Voltage (max): 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Supply Voltage (min): 4.5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 74ABT16821ADL-T; 74ABT16821ADL-T; 935196760518

FEATURES
QUICK REFERENCE DATA
ORDERING INFORMATION
PIN DESCRIPTION
Philips Semiconductors
56-Pin Plastic SSOP Type III
56-Pin Plastic TSSOP Type II
56-Pin Plastic TSSOP Type II
2002 Dec 13
20-bit positive-edge triggered register
Multiple V
Live insertion/extraction permitted
Power-up reset
Power-up 3-State
74ABTH16821A incorporates bus-hold data inputs which
eliminate the need for external pull-up resistors to hold unused
inputs
Output capability: +64 mA / –32 mA
Latch-up protection exceeds 500mA per JEDEC Std 17
ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
20-bit bus-interface D-type flip-flop;
positive-edge trigger (3-State)
SYMBOL
C
55, 54, 52, 51, 49, 48, 47, 45, 44, 43,
I
42, 41, 40, 38, 37, 36, 34, 33, 31, 30
15, 16, 17, 19, 20, 21, 23, 24, 26, 27
t
t
I
C
PLH
PHL
CCZ
CCL
OUT
IN
CC
2, 3, 5, 6, 8, 9, 10, 12, 13, 14,
4, 11, 18, 25, 32, 39, 46, 53
and GND pins minimize switching noise
PACKAGES
PIN NUMBER
7, 22, 35, 50
56, 29
1, 28
Propagation delay
nCP to nQx
Input capacitance
Output capacitance
Quiescent supply current
Quiescent supply current
PARAMETER
TEMPERATURE RANGE
–40 C to +85 C
–40 C to +85 C
–40 C to +85 C
1Q0 – 1Q9
2Q0 – 2Q9
1D0 – 1D9
2D0 – 2D9
1OE, 2OE
SYMBOL
1CP, 2CP
GND
V
CC
2
DESCRIPTION
The 74ABT16821A high-performance BiCMOS device combines
low static and dynamic power dissipation with high speed and high
output drive.
The 74ABT16821A has two 10-bit, edge triggered registers, with
each register coupled to a 3-State output buffer. The two sections of
each register are controlled independently by the clock (nCP) and
Output Enable (nOE) control gates.
Each register is fully edge triggered. The state of each D input, one
set-up time before the LOW-to-HIGH clock transition, is transferred
to the corresponding flip-flop’s Q output.
The 3-State output buffers are designed to drive heavily loaded
3-State buses, MOS memories, or MOS microprocessors.
The active-LOW Output Enable (nOE) controls all ten 3-State
buffers independent of the register operation. When nOE is LOW,
the data in the register appears at the outputs. When nOE is HIGH,
the outputs are in high impedance “off” state, which means they will
neither drive nor load the bus.
Two options are available, 74ABT16821A which does not have the
bus-hold feature and 74ABTH16821A which incorporates the
bus-hold feature.
Outputs disabled; V
Outputs LOW; V
T
V
amb
C
O
L
= 0 V or V
= 50 pF; V
V
CONDITIONS
= 25 C; GND = 0 V
I
= 0 V or V
Data inputs
Data outputs
Output enable inputs (active-LOW)
Clock pulse inputs (active rising edge)
Ground (0 V)
Positive supply voltage
74ABTH16821ADGG
74ABT16821ADGG
74ABT16821ADL
PART NUMBER
CC
CC
CC
; 3-State
CC
CC
= 5 V
= 5.5 V
= 5.5 V
FUNCTION
74ABTH16821A
74ABT16821A
TYPICAL
500
2.4
2.0
10
DWG NUMBER
3
7
SOT371-1
SOT364-1
SOT364-1
Product data
UNIT
mA
pF
pF
ns
A