si514 Silicon Laboratories, si514 Datasheet - Page 22

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si514

Manufacturer Part Number
si514
Description
Any-frequency I 2c Programmable Xo 100 Khz To 250 Mhz
Manufacturer
Silicon Laboratories
Datasheet
Si 514
4.3. I
Configuration and operation of the Si514 is controlled by reading and writing to the RAM space using the I
interface. The device operates in slave mode with 7-bit addressing and can operate in Standard-Mode (100 kbps)
or Fast-Mode (400 kbps). Burst data transfer with auto address increments are also supported.
The I
pins must be connected to the VDD supply via an external pull-up as recommended by the I
Si514 7-bit I
Descriptions" on page 24 for more details.
Data is transferred MSB first in 8-bit words as specified by the I
bit device (slave) address + a write bit, an 8-bit register address, and 8 bits of data as shown in Figure 5.
A write burst operation is also shown where every additional data word is written using an auto-incremented
address.
A read operation is performed in two stages. A data write is used to set the register address, then a data read is
performed to retrieve the data from the set address. A read burst operation is also supported. This is shown in
Figure 6.
22
2
C bus consists of a bidirectional serial data line (SDA) and a serial clock input (SCL). Both the SDA and SCL
2
C Interface
2
C slave address is user-customized during the part number configuration process. See "5. Pin
Write Operation – Single Byte
Write Operation - Burst (Auto Address Increment)
S
S
Slv Addr [6:0]
Slv Addr [6:0]
From slave to master
From master to slave
0
0
A Reg Addr [7:0]
A Reg Addr [7:0]
Figure 5. I
Preliminary Rev. 0.9
2
C Write Operation
1 – Read
0 – Write
A – Acknowledge (SDA LOW)
N – Not Acknowledge (SDA HIGH)
S – START condition
P – STOP condition
A
A
2
Data [7:0]
Data [7:0]
C specification. A write command consists of a 7-
A
A
Reg Addr +1
P
Data [7:0]
A
2
C specification. The
P
2
C

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