si514 Silicon Laboratories, si514 Datasheet

si514

Manufacturer Part Number

si514

Description

Any-frequency I 2c Programmable Xo 100 Khz To 250 Mhz

Manufacturer

Silicon Laboratories

Datasheet

1.SI514.pdf (32 pages)

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Features



Applications



Description

The Si514 user-programmable I

technology to provide any frequency from 100 kHz to 250 MHz with programming

resolution of 0.026 parts per billion. The Si514 uses a single integrated crystal and

Silicon Labs’ proprietary DSPLL synthesizer to generate any frequency across this

range using simple I

VCXOs with an all-digital PLL solution that improves performance where

synchronization is necessary or in free-running reference clock applications. This

solution provides superior supply noise rejection, simplifying low jitter clock

generation in noisy environments. Crystal ESR and DLD are individually

production-tested to guarantee performance and enhance reliability.

The Si514 is factory-configurable for a wide variety of user specifications, including

startup frequency, I

configurations are factory-programmed at time of shipment, eliminating long lead

times and non-recurring engineering charges associated with custom frequency

oscillators.

Functional Block Diagram

Preliminary Rev. 0.9 3/11

N Y

Programmable to any frequency

from 100 kHz to 250 MHz

0.026 ppb frequency tuning

resolution

Glitch suppression on OE, power

on and frequency transitions

1 ps phase jitter (rms, max)

2- to 4-week lead times

Total stability includes 10-year

aging

Comprehensive production test

coverage includes crystal ESR and

DLD

All-digital PLLs

DAC+ VCXO replacement

SONET/SDH/OTN

3G-SDI/HD-SDI/SDI

-F

REQUENCY

C address, supply voltage, output format, and stability. Specific

C commands. Ultra-fine tuning resolution replaces DACs and

C XO utilizes Silicon Laboratories' advanced PLL

C P



R OG R A MM A B L E

On-chip LDO for power supply

noise filtering

3.3, 2.5, or 1.8 V operation

Differential (LVPECL, LVDS,

HCSL) or CMOS output options

Optional integrated 1:2 CMOS

fanout buffer

Industry standard 5 x 7 and

3.2 x 5 mm packages

–40 to 85

Datacom

Industrial automation

FPGA/ASIC clock generation

FPGA synchronization

C operation

X O ( 1 0 0 k H

GND

SDA

Ordering Information:

SCL

Pin Assignments:

Z TO

See page 25.

See page 24.

Si5602

Si514

2 5 0 M H

CLK–

CLK+

Si514

)

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