sc3200 Advanced Micro Devices, sc3200 Datasheet - Page 288
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sc3200
Manufacturer Part Number
sc3200
Description
Geode-tm Sc3200 Processor
Manufacturer
Advanced Micro Devices
Datasheet
1.SC3200.pdf
(447 pages)
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Offset 20h
Audio Bus Master 0: Output to codec; 32-bit; Left and Right Channels; Slots 3 and 4.
Offset 21h
Audio Bus Master 0: Output to codec; 32-bit; Left and Right Channels; Slots 3 and 4.
Offset 22h-23h
Offset 24h-27h
Audio Bus Master 0: Output to codec; 32-bit; Left and Right Channels; Slots 3 and 4.
Note:
31:2
Bit
7:4
2:1
7:2
1:0
1
0
3
0
1
0
The Physical Region Descriptor (PRD) table consists of one or more entries - each describing a memory region to or from
which data is to be transferred. Each entry consists of two DWORDs.
Description
Assert Masked Internal IRQ1.
0: Disable.
1: Enable.
Reserved. Must be set to 0.
Reserved. Must be set to 0. Must return 0 on reads.
Read or Write Control. Sets the transfer direction of the Audio Bus Master.
0: PCI reads are performed.
1: PCI writes are performed.
This bit must be set to 0 (read), and should not be changed when the bus master is active.
Reserved. Must be set to 0. Must return 0 on reads.
Bus Master Control. Controls the state of the Audio Bus Master.
0: Disable.
1: Enable.
Setting this bit to 1 enables the bus master to begin data transfers.
When writing 0 to this bit, the bus master must either be paused, or reach EOT. Writing 0 to this bit while the bus master is
operating may result in unpredictable behavior (and may crash the bus master state machine). The only recovery from such
unpredictable behavior is a PCI reset.
Reserved.
Bus Master Error. Indicates if hardware encountered a second EOP before software has cleared the first.
0: No.
1: Yes.
If hardware encounters a second EOP (end of page) before software has cleared the first, it causes the bus master to pause
until this register is read to clear the error.
End of Page. Indicates if the bus master transferred data which is marked by EOP bit in the PRD table (bit 30).
0: No.
1: Yes.
Pointer to the Physical Region Descriptor Table. This bit field contains a PRD table pointer for Audio Bus Master 0.
When written, this register points to the first entry in a PRD table. Once Audio Bus Master 0 is enabled (Command Register
bit 0 = 1), it loads the pointer and updates this register (by adding 08h) so that it points to the next PRD.
When read, this register points to the next PRD.
Reserved. Must be set to 0.
Table 6-38. F3BAR0+Memory Offset: Audio Configuration Registers (Continued)
DWORD 0:
DWORD 1:
Revision 5.1
[31:0]
31
30
29
[28:16]
[15:0]
Audio Bus Master 0 Command Register (R/W)
Audio Bus Master 0 PRD Table Address (R/W)
Audio Bus Master 0 SMI Status Register (RC)
= Memory Region Physical Base Address
= End of Table Flag
= End of Page Flag
= Loop Flag (JMP)
= Reserved (0)
= Byte Count of the Region (Size)
Not Used
Core Logic Module - Audio Registers - Function 3
AMD Geode™ SC3200 Processor Data Book
Reset Value: 00000000h
Reset Value: 00h
Reset Value: 00h
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