cy28445-5 SpectraLinear Inc, cy28445-5 Datasheet - Page 8

• Manufacturer Part Number: cy28445-5
• Description: Clock Generator For Intel Calistoga Chipset
• Manufacturer: SpectraLinear Inc

Rev 1.1, June 30, 2007
Byte 6: Control Register 6 (continued)
Byte 7: Vendor ID
Byte 8: Control Register 8
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Bit
Bit
Bit
1
3
2
0
@Pup
@Pup
@Pup
HW
HW
HW
1
0
0
0
1
1
0
0
0
0
0
0
0
0
1
1
1
outputs except those set
to free running
FSC
FSB
FSA
Revision Code Bit 3
Revision Code Bit 2
Revision Code Bit 1
Revision Code Bit 0
Vendor ID Bit 3
Vendor ID Bit 2
Vendor ID Bit 1
Vendor ID Bit 0
CPU_SS
CPU-DWN_SS
RESERVED
RESERVED
RESERVED
48M
PCI1
PCIF0
PCI, PCIF and SRC clock
Name
Name
Name
SW PCI_STP Function
0 = SW PCI_STP assert, 1 = SW PCI_STP deassert
When this bit is set to 0, all STOPPABLE PCI, PCIF and SRC outputs will
be stopped in a synchronous manner with no short pulses.
When this bit is set to 1, all STOPPED PCI, PCIF and SRC outputs will
resume in a synchronous manner with no short pulses.
FSC Reflects the value of the FSC pin sampled on power-up
0 = FSC was low during VTT_PWRGD# assertion
FSB Reflects the value of the FSB pin sampled on power-up
0 = FSB was low during VTT_PWRGD# assertion
FSA Reflects the value of the FSA pin sampled on power-up
0 = FSA was low during VTT_PWRGD# assertion
0: –0.5% (Peak to peak)
1: –1.0% (Peak to peak)
0: Down Spread
1: Center Spread
RESERVED, Set = 0
RESERVED, Set = 0
RESERVED, Set = 0
48-MHz Output Drive Strength
0 = Low, 1 = High
33-MHz Output Drive Strength
0 = Low, 1 = High
33-MHz Output Drive Strength
0 = Low, 1 = High
Revision Code Bit 3
Revision Code Bit 2
Revision Code Bit 1
Revision Code Bit 0
Vendor ID Bit 3
Vendor ID Bit 2
Vendor ID Bit 1
Vendor ID Bit 0
Description
Description
Description
CY28445-5
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