cy28548 SpectraLinear Inc, cy28548 Datasheet - Page 12

• Manufacturer Part Number: cy28548
• Description: Clock Generator For Intel Crestline Chipset
• Manufacturer: SpectraLinear Inc

Rev 1.5 September 16, 2008
Byte 13: Control Register 13 (continued)
Byte 14: Control Register 14
Byte 15: Control Register 15
Byte 16: Control Register 16
Byte 17: Control Register 17
Bit
Bit
Bit
Bit
Bit
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
@Pup
@Pup
@Pup
@Pup
@Pup
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SE1/SE2_DSC_1
CPU_DAF_M6
CPU_DAF_M5
CPU_DAF_M4
CPU_DAF_M3
CPU_DAF_M2
CPU_DAF_M1
CPU_DAF_M0
CPU_DAF_N7
CPU_DAF_N6
CPU_DAF_N5
CPU_DAF_N4
CPU_DAF_N3
CPU_DAF_N2
CPU_DAF_N1
CPU_DAF_N0
CPU_DAF_N8
PCI-E_N7
PCI-E_N6
PCI-E_N5
PCI-E_N4
PCI-E_N3
PCI-E_N2
PCI-E_N1
PCI-E_N0
Reserved
SW_PCI
Name
Name
Name
Name
Name
SE1 and SE2 Drive Strength Setting 1 of 3
0 = Low, 1= High
Reserved
SW PCI_STP# Function
0 = SW PCI_STP assert, 1 = SW PCI_STP deassert
When this bit is set to 0, all STOPPABLE PCI, PCIF and SRC outputs are
stopped in a synchronous manner with no short pulses.
When this bit is set to 1, all STOPPED PCI, PCIF and SRC outputs are
resumed in a synchronous manner with no short pulses.
If Prog_CPU_EN is set, the values programmed in CPU_DAF_N[8:0] and
CPU_DAF_M[6:0] are used to determine the CPU output frequency.
See Byte 14 for description
If Prog_CPU_EN is set, the values programmed in CPU_DAF_N[8:0] and
CPU_DAF_M[6:0] are used to determine the CPU output frequency.
PCI-E Dial-A-Frequency
PCI-E Dial-A-Frequency Bit N6
PCI-E Dial-A-Frequency Bit N5
PCI-E Dial-A-Frequency Bit N4
PCI-E Dial-A-Frequency Bit N3
PCI-E Dial-A-Frequency Bit N2
PCI-E Dial-A-Frequency Bit N1
PCI-E Dial-A-Frequency Bit N0
®
Bit N7
Description
Description
Description
Description
Description
(See Byte 17 and 18 for more setting)
CY28548
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