cy241v08a-05 Cypress Semiconductor Corporation., cy241v08a-05 Datasheet - Page 4

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cy241v08a-05

Manufacturer Part Number
cy241v08a-05
Description
Mpeg Clock Generator With Vcxo
Manufacturer
Cypress Semiconductor Corporation.
Datasheet
Document #: 38-07670 Rev. **
AC Electrical Specifications
Test and Measurement Set-up
Voltage and Timing Definitions
Note:
DC
ER
ER
ER
ER
t
t
3. Not 100% tested.
Parameter
9
10
OR
OF
OR
OF
[3]
Output Duty Cycle
Rising Edge Rate –05
Falling Edge Rate –05
Rising Edge Rate –06
Falling Edge Rate –06
Clock Jitter
PLL Lock Time
Name
Clock
Output
Clock
Output
(V
Figure 2. ER = (0.6 x V
VDD
DD
t
= 3.3V)
3
0.1 µF
Figure 1. Duty Cycle Definition
Duty Cycle is defined in Figure 1, 50% of V
Output Clock Edge Rate, Measured from 20%
to 80% of V
Output Clock Edge Rate, Measured from 80%
to 20% of V
Output Clock Edge Rate, Measured from 20%
to 80% of V
Output Clock Edge Rate, Measured from 80%
to 20% of V
Peak-to-peak period jitter
t
[3]
2
GND
t
DD
DD
DD
DD
1
DD
, CLOAD = 15 pF See Figure 2.
, CLOAD = 15 pF See Figure 2.
, CLOAD = 15 pF See Figure 2.
, CLOAD = 15 pF See Figure 2.
DUT
) /t3, EF = (0.6 x V
Description
t
4
V
80% of V
20% of V
0V
DD
C
V
50% of V
0V
DD
LOAD
DD
Outputs
) /t4
DD
DD
DD
DD
CY241V08A-05,06
Min.
0.8
0.8
0.7
0.7
45
Typ.
1.4
1.4
1.1
1.1
50
Max.
100
55
3
Page 4 of 6
V/ns
V/ns
V/ns
V/ns
Unit
ms
ps
%
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