cy24292 Cypress Semiconductor Corporation., cy24292 Datasheet - Page 8

• Manufacturer Part Number: cy24292
• Description: Four Outputs Pci-express Clock Generator
• Manufacturer: Cypress Semiconductor Corporation.

Application Information
Crystal Recommendations
The CY24292 requires a parallel resonance crystal. Substituting a series resonance crystal causes the CY24292 to operate at the
wrong frequency and violate the ppm specification. For most applications there is a 300 ppm frequency shift between the series and
parallel crystals due to incorrect loading.
Table 13. Crystal Recommendations
Crystal Loading
Crystal loading plays a critical role in achieving low ppm
performance. To realize low ppm performance, consider the total
capacitance the crystal sees to calculate the appropriate
capacitive loading (CL).
Figure 2
capacitors. It is important to note that the trim capacitors in series
with the crystal are not parallel. It is a common misconception
that load capacitors are in parallel with the crystal and are
approximately equal to the load capacitance of the crystal. This
is not true.
Calculating Load Capacitors
In addition to the standard external trim capacitors, the trace
capacitance and pin capacitance must also be considered to
correctly calculate crystal loading.
As mentioned in the previous section, the capacitance on each
side of the crystal is in series with the crystal. This means the
total capacitance on each side of the crystal must be twice the
specified crystal load capacitance (CL). While the capacitance
on each side of the crystal is in series with the crystal, the trim
capacitors (Ce1, Ce2) must be calculated to provide equal
capacitive loading on both sides.
Figure 2. Crystal Loading Example
Document Number: 001-46142 Rev. *C
Frequency
25.00 MHz
Cs1
shows a typical crystal configuration using two trim
Ce1
X1
Ci
1
Clock
Chip
Parallel
XTAL
Cut
Ci2
X2
Ce2
Load Cap
(max)
16 pF
Cs2
3 to 6 pF
26 pF
Pin
Trim
Trace
2.8 pF
Eff Series Rest
(max)
30 Ω
Drive (max)
Use the following formulas to calculate the trim capacitor values
for Ce1 and Ce2.
CL ................................................... Crystal load capacitance
CLe ......................................... Actual loading seen by crystal
Ce ..................................................... External trim capacitors
Cs ..............................................Stray capacitance (terraced)
Ci .......................................................... Internal capacitance
Current Source (Iref) Reference Resistor
If the board target trace impedance (Z) is 50Ω, then for
R
(I
Output Termination
The PCI-Express differential clock outputs of CY24292 are open
source drivers and require an external series resistor and a
resistor to ground. These resistor values and their allowable
locations are explained in detail in the section
Layout Guidelines
configured for LVDS compatible voltage levels. See section
LVDS Compatible Layout Guidelines
1.0 mW
OH
REF
) is equal to 6*IREF.
CLe
= 475Ω (1%) provides IREF of 2.32 mA. The output current
Total capacitance (as seen by the crystal)
=
Tolerance (max) Stability (max) Aging (max)
(
Load capacitance (each side)
Ce1 + Cs1 + Ci1
30 ppm
Ce = 2 * CL – (Cs + Ci)
on page 9. The CY24292 can also be
1
using standard value trim capacitors
+
1
10 ppm
Ce2 + Cs2 + Ci2
on page 10.
1
CY24292
Page 8 of 16
PCI-Express
5 ppm/yr
)
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