cy29658 Cypress Semiconductor Corporation., cy29658 Datasheet - Page 5

• Manufacturer Part Number: cy29658
• Description: 2.5v Or 3.3v 200-mhz 10-output Zero Delay Buffer
• Manufacturer: Cypress Semiconductor Corporation.

Document #: 38-07478 Rev. **
AC Electrical Specifications
f
V
V
f
DC
t
t
t
t
t
t
BW
t
t
t
t
refDC
MAX
r
( )
PD
sk(O)
PLZ, HZ
PZL, ZH
JIT(CC)
JIT(PER)
JIT( )
LOCK
PP
CMR
, t
PECL_CLK
PECL_CLK
Parameter
Figure 2. Propagation Delay t( ), Static Phase Offset
FB_IN
f
Input Duty Cycle
Peak-Peak Input Voltage
Common Mode Range
Maximum Output Frequency
Output Duty Cycle
Output Rise/Fall times
Propagation Delay (static phase
offset)
Propagation Delay (PLL and
divider bypass)
Output-to-Output Skew
Output Disable Time
Output Enable Time
PLL Closed Loop Bandwidth
(–3dB)
Cycle-to-Cycle Jitter
Period Jitter
I/O Phase Jitter
Maximum PLL Lock Time
Z = 50 ohm
t
Differential
Generator
V
Pulse
P P
Description
(V
Figure 1. AC Test Reference for V
DD
[8]
Zo = 50 ohm
Zo = 50 ohm
= 3.3V ± 5%, T
VTT
R
T
VCMR
LVPECL
LVPECL
0.55V to 2.4V
PCLK to FB_IN, same VDD
PCLK to Q0 – Q9
BYPASS# = 0
I/O same VDD
VDD
= 50 ohm
GND
VDD/2
2 Output
4 Output
2 Feedback
4 Feedback
A
= –40°C to +85°C) (continued)
Condition
PECL_CLK
PECL_CLK
Qn
Figure 3. Propagation Delay t
DD
= 3.3V / 2.5V
–200
Zo = 50 ohm
Min.
500
100
1.2
0.1
3.6
40
50
45
–
–
–
–
–
–
–
–
–
t
R
PD
T
[7]
V
= 50 ohm
P P
1.9 – 2.2
1.8 – 2.1
Typ.
4.8
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
VTT
PD
VDD - 0.9
, PLL Bypass
Max.
1000
200
125
225
150
100
150
1.0
6.0
60
55
75
6
6
–
–
1
CY29658
Page 5 of 7
VCMR
VDD
GND
VDD/2
MHz
MHz
Unit
mV
ms
ns
ps
ns
ps
ns
ns
ps
ps
ps
%
%
V