spd6722qcce Intel Corporation, spd6722qcce Datasheet - Page 83

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spd6722qcce

Manufacturer Part Number
spd6722qcce
Description
Isa-to-pc-card Pcmcia Controllers
Manufacturer
Intel Corporation
Datasheet

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10.7.6
Datasheet
Register Name: Extension Control 2
Index: 2Fh
Bit 7
Reserved
RW:00
Extension Control 2
Bit 5 — Active-high GPSTB
Bit 4 — GPSTB on IOW*
Note that setting this bit forces the pull-ups on A_GPSTB (PD6722) to be off, independent of the
setting of the Pull-Up Control bit (index 2Fh, extended index 03h, bit 5). See
(PD6722 only, Socket A, Index 6Fh)” on page
(PD6722 only)” on page
Bit 3 — GPSTB on IOR*
Note that setting this bit forces the pull-ups on B_GPSTB (PD6722) to be off, independent of the
setting of the Pull-Up Control bit (index 6Fh, extended index 03h, bit 5). See
(PD6722 only, Socket A, Index
only)”, and
Bit 2 — Totem-pole GPSTB
When GPSTB outputs are totem-pole, their ‘high’ level is driven to the level of the +5V pin,
instead of high-impedance.
Bit 6
0
1
0
1
0
1
0
1
“VS1# and VS2# Voltage
GPSTB ouputs are active-low.
GPSTB ouputs are active-high.
B_GPSTB (PD6722) pins (socket B) are used as voltage sense.
B_GPSTB (PD6722) pins are used to strobe I/O reads on SD[15:8].
A_GPSTB (PD6722) pins are used as voltage sense.
A_GPSTB (PD6722) pins are used to strobe I/O writes on SD[15:8].
GPSTB ouputs are open-collector.
GPSTB ouputs are totem-pole.
Active-high
GPSTB
RW:0
Bit 5
91, and
(PD6722 only)
GPSTB on
(PD6722 only)
Extended Index: 0Bh
IOW*
RW:0
(PD6722 only)
6Fh)”,
Bit 4
“VS1# and VS2# Voltage Detection” on page
ISA-to-PC-Card (PCMCIA) Controllers — PD6710/’22
Detection”.
“Using GPSTB Pins for External Port Control (PD6722
GPSTB on
RW:0
IOR*
Bit 3
82,
“Using GPSTB Pins for External Port Control
Totem-pole
GPSTB
RW:0
Bit 2
Register Compatibility Type: ext.
Bit 1
“External Data
“External Data
95.
Register Per: socket
Reserved
RW:00
Bit 0
83

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