spd6722qcce Intel Corporation, spd6722qcce Datasheet - Page 74
spd6722qcce
Manufacturer Part Number
spd6722qcce
Description
Isa-to-pc-card Pcmcia Controllers
Manufacturer
Intel Corporation
Datasheet
1.SPD6722QCCE.pdf
(138 pages)
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PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers
10.4
74
Register Name: Chip Information
Index: 1Fh
1. The value for PD6710 is ‘0’, and the value for PD6722 is ‘1’.
2. This read-only value depends on the revision level of the PD67XX chip.
3. The value for PD6722 is ‘1’. The value for the PD6710 is ‘0’.
PC Card Controller Identifi-
Bit 7
cation
R:11
Bit 5 — Three-State Bit 7
This bit enables floppy change bit compatibility.
Bit 6 — DMA System (PD6722 only)
On the PD6710, this bit is reserved.
On the PD6722, this bit is used to configure system interface signals for normal or DMA operation.
At reset, the signals IRQ9, IRQ10, and -VPP_VALID are in non-DMA mode, and this bit is set to
‘0’. When this bit is set to ‘1’, the IRQ9, IRQ10, and -VPP_VALID pins are reconfigured for
system bus DMA interfacing. Refer to
functional description of these pins during DMA operation.
Bit 7 — IRQ15 Is RI Out
This bit determines the function of the IRQ15 pin. When configured for ring indicate, IRQ15 is
used to resume a processor with NMI or SMI such as an 82486SL when a high-to-low change is
detected on the -STSCHG pin.
Chip Information
Bit 6
0
1
0
1
0
1
Configured for non-DMA mode on the PD6722.
Configured for DMA mode on the PD6722.
Normal IRQ15 operation.
IRQ15 is connected to Ring Indicate pin on the host processor.
Dual/Single
Socket*
Bit 5
R:n
1
For socket I/O at address 03F7h and 0377h, do not drive bit 7.
Bit 4
“DMA Operation (PD6722 only)” on page 97
PD67XX Revision Level
Bit 3
Normal operation.
R:nnnn
2
Bit 2
Register Compatibility Type: ext.
Bit 1
Register Per: chip
for a
Datasheet
Reserved
Bit 0
R:n
3
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