MX26LV160AT Macronix International, MX26LV160AT Datasheet - Page 8

• Manufacturer Part Number: MX26LV160AT
• Description: 16M-BIT [2Mx8/1Mx16] CMOS SINGLE VOLTAGE 3V ONLY BOOT SECTOR HIGH SPEED eLiteFlashTM MEMORY
• Manufacturer: Macronix International

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COMMAND DEFINITIONS
Device operations are selected by writing specific ad-
dress and data sequences into the command register.
Writing incorrect address and data values or writing them
Note:
1. ADI = Address of Device identifier; A1=0, A0 = 0 for manufacturer code,A1=0, A0 = 1 for device code. A2-A19=do not care.
2. PA = Address of memory location to be programmed.
3. The system should generate the following address patterns: 555H or 2AAH to Address A10~A0 in word mode/AAAH or
4. For Sector Protect Verify operation: If read out data is 01H, it means the sector has been protected. If read out data is 00H, it
5. Any number of CFI data read cycles are permitted.
P/N:PM1123
TABLE 4. MX26LV160AT/AB COMMAND DEFINITIONS
Command
Reset
Read
Read Silicon ID
Sector Protect
Verify
Program
Chip Erase
Sector Erase
CFI Query
(Refer to table 3)
DDI = Data of Device identifier : C2H for manufacture code, 22DA/DA(Top), and 225B/5B(Bottom) for device code.
X = X can be VIL or VIH
RA=Address of memory location to be read.
RD=Data to be read at location RA.
PD = Data to be programmed at location PA.
SA = Address of the sector.
555H to Address A10~A-1 in byte mode.
Address bit A11~A19=X=Don't care for all address commands except for Program Address (PA) and Sector Address (SA).
Write Sequence may be initiated with A11~A19 in either state.
means the sector is still not being protected.
Byte
Byte
Word
Byte
Byte
Byte
Word
Byte
Word
Word
Word
Word
Cycle Addr
Bus
1
4
4
4
4
4
4
6
6
6
6
1
1
First Bus
Cycle
XXXH F0H
RA
555H AAH 2AAH
AAAH AAH 555H
555H AAH 2AAH
AAAH AAH 555H
555H AAH 2AAH
AAAH AAH 555H
555H AAH 2AAH
AAAH AAH 555H
555H AAH 2AAH
AAAH AAH 555H
555H 98
AAAH 98
Data Addr
RD
Second Bus
Cycle
Data Addr
55H
55H
55H
55H
55H
55H
55H
55H
55H
55H
MX26LV160AT/AB
8
Third Bus
Cycle
555H
AAAH 90H ADI
555H
AAAH 90H (SA)
555H
AAAH A0H PA
555H
AAAH 80H AAAH AAH
555H
AAAH 80H AAAH AAH
in the improper sequence will reset the device to the
read mode. Table 5 defines the valid register command
sequences.
Data Addr Data
90H ADI
90H (SA)
A0H PA
80H 555H AAH
80H 555H AAH
Fourth Bus
Cycle
x02H XX01H
x04H 01H
DDI
DDI
XX00H
00H
PD
PD
Fifth Bus
Cycle
Addr
2AAH 55H
555H 55H
2AAH 55H
555H 55H
Data Addr Data
REV. 1.1, NOV. 18, 2004
Sixth Bus
Cycle
555H 10H
AAAH 10H
SA
SA
30H
30H