MX26LV160AT Macronix International, MX26LV160AT Datasheet
MX26LV160AT
Available stocks
Related parts for MX26LV160AT
MX26LV160AT Summary of contents
Page 1
... Data# polling & Toggle bit for detection of program and erase operation completion • Ready/Busy# pin (RY/BY#) GENERAL DESCRIPTION The MX26LV160AT/ 16-mega bit high speed Flash memory organized as 2M bytes of 8 bits or 1M words of 16 bits. MXIC's high speed Flash memories offer the most cost-effective and reliable read/write non-volatile random access memory ...
Page 2
... Q14 Q13 Q12 VCC A15 1 A14 2 A13 3 A12 4 A11 5 A10 A19 WE# 11 RESET# 12 MX26LV160AT/ RY/BY# 15 A18 16 A17 A14 A15 A16 BYTE# Q15/A-1 A10 A11 Q7 Q14 ...
Page 3
... BLOCK STRUCTURE TABLE 1: MX26LV160AT SECTOR ARCHITECTURE Sector Sector Size Byte Mode Word Mode Byte Mode(x8) SA0 64Kbytes 32Kwords 000000-00FFFF 00000-07FFF SA1 64Kbytes 32Kwords 010000-01FFFF 08000-0FFFF SA2 64Kbytes 32Kwords 020000-02FFFF 10000-17FFF www.DataSheet4U.com SA3 64Kbytes 32Kwords 030000-03FFFF 18000-1FFFF SA4 64Kbytes 32Kwords 040000-04FFFF 20000-27FFF ...
Page 4
... E0000-E7FFF SA32 64Kbytes 32Kwords 1D0000-1DFFFF E8000-EFFFF SA33 64Kbytes 32Kwords 1E0000-1EFFFF F0000-FFFFF SA34 64Kbytes 32Kwords 1F0000-1FFFFF F8000-FFFFF Note: Byte mode:address range A19:A-1, word mode:address range A19:A0. P/N:PM1123 MX26LV160AT/AB Address range 000000-003FFF 00000-01FFF 004000-005FFF 02000-02FFF 006000-007FFF 03000-03FFF 4 Sector Address ...
Page 5
... BLOCK DIAGRAM CE# OE# WE# RESET# www.DataSheet4U.com A0-A19 Q0-Q15/A-1 P/N:PM1123 MX26LV160AT/AB CONTROL PROGRAM/ERASE INPUT HIGH VOLTAGE LOGIC ADDRESS FLASH ARRAY LATCH AND BUFFER Y-PASS GATE SENSE AMPLIFIER PROGRAM DATA LATCH I/O BUFFER 5 WRITE STATE MACHINE (WSM) STATE REGISTER ARRAY SOURCE COMMAND HV DATA DECODER PGM ...
Page 6
... The timing and verification of electrical erase are controlled internally within the device. AUTOMATIC SECTOR ERASE The MX26LV160AT/AB is sector(s) erasable using MXIC's Auto Sector Erase algorithm. The Automatic Sector Erase algorithm automatically programs the specified sector(s) prior to electrical erase. The timing and verifi- cation of electrical erase are controlled internally within the device ...
Page 7
... TABLE 3. MX26LV160AT/AB AUTO SELECT MODE OPERATION Description Manufacturer Code Read Device ID Silicon (Top Boot Block) www.DataSheet4U.com ID Device ID (Bottom Boot Block) Sector Protection Verification NOTE:SA=Sector Address, X=Don't Care, L=Logic Low, H=Logic High P/N:PM1123 MX26LV160AT/AB A19 A11 Mode CE# OE# WE A12 A10 ...
Page 8
... COMMAND DEFINITIONS Device operations are selected by writing specific ad- dress and data sequences into the command register. Writing incorrect address and data values or writing them TABLE 4. MX26LV160AT/AB COMMAND DEFINITIONS www.DataSheet4U.com Command Reset Read Read Silicon ID Word Byte Sector Protect Word Verify Byte ...
Page 9
... Device operations are selected by writing specific address and data sequences into the command register. Writing incorrect address and data values or writing them in the improper sequence will reset the device to the read mode. Table 5 defines the valid register command sequences. TABLE 5. MX26LV160AT/AB BUS OPERATION www.DataSheet4U.com DESCRIPTION ...
Page 10
... Sequence section for more information. ICC2 in the DC Characteristics table represents the ac- tive current specification for the write mode. The "AC P/N:PM1123 MX26LV160AT/AB Characteristics" section contains timing specification table and timing diagrams for write operations. STANDBY MODE When using both pins of CE# and RESET#, the device enter CMOS Standby with both pins held at VCC 0 ...
Page 11
... high voltage (VID). However, multi- plexing high voltage onto address lines is not generally desired system design practice. The MX26LV160AT/AB contains a Silicon-ID-Read op- eration to supple traditional PROM programming meth- odology. The operation is initiated by writing the read silicon ID command sequence into the command regis- ter ...
Page 12
... TABLE 6. SILICON ID CODE Pins Manufacture code Word VIL Byte Device code Word VIH for MX26LV160AT Byte Device code Word VIH www.DataSheet4U.com for MX26LV160AB Byte Sector Protection Word X Verification Byte X READING ARRAY DATA The device is automatically set to reading array data after device power-up. No commands are required to re- trieve data ...
Page 13
... The command sequence requires four bus cycles, and is initiated by writing two unlock write cycles, followed by the program set-up command. The program P/N:PM1123 MX26LV160AT/AB address and data are written next, which in turn initiate the Embedded Program algorithm. The system is not re- quired to provide further controls or timings. The device automatically generates the program pulses and verifies the programmed cell margin ...
Page 14
... Q6:Toggle BIT I Toggle Bit indicates whether an Automatic Pro- P/N:PM1123 MX26LV160AT/AB gram or Erase algorithm is in progress or complete. Toggle Bit I may be read at any address, and is valid after the rising edge of the final WE# or CE#, whichever happens first, in the command sequence (prior to the program or erase operation), and during the sector time-out ...
Page 15
... If this time-out condition occurs during the chip erase operation, it specifies that the entire chip is bad or com- bination of sectors are bad. P/N:PM1123 MX26LV160AT/AB If this time-out condition occurs during the word/byte pro- gramming operation, it specifies that the entire sector containing that byte is bad and this sector may not be reused, (other sectors are still functional and can be re- used) ...
Page 16
... Q7 and Q2 require a valid address when reading status information. Refer to the appropriate subsection for further details switches to '1' when an Auto Program or Auto Erase operation has exceeded the maximum timing limits. See "Q5 : Exceeded Timing Limits" for more information. P/N:PM1123 MX26LV160AT/ ...
Page 17
... In order to reduce power switching effect, each device should have a 0.1uF ceramic capacitor connected be- tween its VCC and GND. POWER-UP SEQUENCE The MX26LV160AT/AB powers up in the Read only mode. In addition, the memory contents may only be altered after successful completion of the predefined command sequences. ...
Page 18
... It is also possible to determine if the chip is unprotected in the system by writing the Read Silicon ID command. Performing a read operation with A1=VIH, it will produce 00H at data outputs(Q0-Q7) for an unprotected sector noted that all sectors are unprotected after the chip unprotect algorithm is completed. P/N:PM1123 MX26LV160AT/AB 18 REV. 1.1, NOV. 18, 2004 ...
Page 19
... This is a stress rating only; functional operation of the device at these or any other conditions above those in- dicated in the operational sections of this data sheet is not implied. Exposure of the device to absolute maxi- mum rating conditions for extended periods may affect device reliability. P/N:PM1123 MX26LV160AT/AB OPERATING RATINGS Commercial (C) Devices +150 C ...
Page 20
... If VIH is over the specified maximum value, read operation cannot be guaranteed. 3. Automatic sleep mode enable the low power mode when addresses remain stable for tACC +30ns. P/N:PM1123 MX26LV160AT/ 1.0 MHz MIN. TYP VCC = 3.0V~3.6V MX26LV160AT/AB MIN. TYP -0.5 0.7xVCC 11 ...
Page 21
... Input rise and fall times is equal to or less than 5ns. • Output load: 1 TTL gate + 100pF (Including scope and jig), for 26LV160AT/AB-70. 1 TTL gate + 30pF (Includ- ing scope and jig) for 26LV160AT/AB-55. • Reference levels for measuring timing: 1.5V. P/N:PM1123 MX26LV160AT/ VCC = 3.0V~3.6V 26LV160AT/AB-55 26LV160AT/AB-70 MIN ...
Page 22
... SWITCHING TEST CIRCUITS www.DataSheet4U.com SWITCHING TEST WAVEFORMS 3.0V 0V P/N:PM1123 MX26LV160AT/AB DEVICE UNDER TEST CL 6.2K ohm CL= 100pF Including jig capacitance for MX26LV160T/B-70 (30pF for MX26LV160T/B-55) TEST POINTS INPUT AC TESTING: Inputs are driven at 3.0V for a logic "1" and 0V for a logic "0". Input pulse rise and fall times are < 5ns. ...
Page 23
... FIGURE 1. READ TIMING WAVEFORMS VIH Addresses VIL VIH CE# www.DataSheet4U.com VIL VIH WE# VIL VIH OE# VIL HIGH Z VOH Outputs VOL VIH RESET# VIL P/N:PM1123 MX26LV160AT/AB tRC ADD Valid tACC tCE tOE tOEH tACC tOH DATA Valid 23 tDF HIGH Z REV. 1.1, NOV. 18, 2004 ...
Page 24
... OE# Control) tVLHT Voltage transition time tOESP OE# setup time to WE# active tBAL Sector Address Load Time NOTES: 1. Not 100% tested. 2. See the "Erase and Programming Performance" section for more information. P/N:PM1123 MX26LV160AT/ VCC = 3.0V~3.6V 26LV160AT/AB-55 MIN. MAX ...
Page 25
... WE# Hold Time tCP CE# Pulse Width tCPH CE# Pulse Width High tWHWH1 Programming Operation(note2) tWHWH2 Sector Erase Operation (note2) NOTE: 1. Not 100% tested. 2. See the "Erase and Programming Performance" section for more information. P/N:PM1123 MX26LV160AT/ VCC = 3.0V~3.6V 26LV160AT/AB-55 MIN. MAX ...
Page 26
... FIGURE 2. COMMAND WRITE TIMING WAVEFORM VCC 3V VIH Addresses VIL www.DataSheet4U.com VIH WE# VIL CE# VIH VIL OE# VIH VIL VIH Data VIL P/N:PM1123 MX26LV160AT/AB ADD Valid tAH tAS tOES tWP tCWC tCS tCH tDS tDH DIN 26 tWPH REV. 1.1, NOV. 18, 2004 ...
Page 27
... VCC NOTES: 1.PA=Program Address, PD=Program Data, DOUT is the true data the program address P/N:PM1123 MX26LV160AT/AB ing after automatic programming starts. Device outputs DATA# during programming and DATA# after program- ming on Q7. (Q6 is for toggle bit; see toggle bit, DATA# polling, timing waveform) ...
Page 28
... FIGURE 4. AUTOMATIC PROGRAMMING ALGORITHM FLOWCHART www.DataSheet4U.com P/N:PM1123 MX26LV160AT/AB Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data A0H Address 555H Write Program Data/Address Increment Address No No Auto Program Completed 28 START Data Poll from system Verify Word Ok ? YES Last Address ? YES REV ...
Page 29
... RESET# RY/BY# NOTES: 1.PA=Program Address, PD=Program Data, DOUT=Data Out, DQ7=complement of data written to device. 2.Figure indicates the last two bus cycles of the command sequence. P/N:PM1123 MX26LV160AT/AB PA for program 555 for program SA for sector erase 2AA for erase 555 for chip erase Data# Polling ...
Page 30
... VCC NOTES: SA=sector address(for Sector Erase), VA=Valid Address for reading status data(see "Write Operation Status"). P/N:PM1123 MX26LV160AT/AB matic erase starts. Device outputs 0 during erasure and 1 after erasure on Q7. (Q6 is for toggle bit; see toggle bit, DATA# polling, timing waveform) Erase Command Sequence(last two cycle) ...
Page 31
... FIGURE 7. AUTOMATIC CHIP ERASE ALGORITHM FLOWCHART www.DataSheet4U.com P/N:PM1123 MX26LV160AT/AB START Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 80H Address 555H Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 10H Address 555H Data Pall from System ...
Page 32
... NOTES: SA=sector address(for Sector Erase), VA=Valid Address for reading status data(see "Write Operation Status"). P/N:PM1123 MX26LV160AT/AB ing after automatic erase starts. Device outputs 0 dur- ing erasure and 1 after erasure on Q7. (Q6 is for toggle bit; see toggle bit, DATA# polling, timing waveform) ...
Page 33
... FIGURE 9. AUTOMATIC SECTOR ERASE ALGORITHM FLOWCHART www.DataSheet4U.com P/N:PM1123 MX26LV160AT/AB START Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 80H Address 555H Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 30H Sector Address NO Last Sector ...
Page 34
... Figure 10. IN-SYSTEM SECTOR PROTECT/CHIP UNPROTECT TIMING WAVEFORM (RESET# Con- trol) VID VIH RESET# www.DataSheet4U.com SA, A6 A1, A0 Data CE# WE# OE# Note: When sector protect, A6=0, A1=1, A0=0. When chip unprotect, A6=1, A1=1, A0=0. P/N:PM1123 MX26LV160AT/AB Valid* Sector Protect or Sector Unprotect 60h 60h Sector Protect =150us 1us chip Unprotect =15ms 34 Valid* Valid* Verify Status 40h ...
Page 35
... Figure 11. SECTOR PROTECT TIMING WAVEFORM (A9, OE# Control www.DataSheet4U.com 12V 3V A9 12V 3V OE# WE# CE# Data A19-A12 Notes: tVLHT (Voltage transition time)=4us min. tOESP (OE# setup time to WE# active)=4us min. P/N:PM1123 MX26LV160AT/AB tVLHT tVLHT tWPP 1 tOESP Sector Address 35 Verify tVLHT 01H F0H tOE REV. 1.1, NOV. 18, 2004 ...
Page 36
... Figure 12. SECTOR PROTECTION ALGORITHM (A9, OE# Control) www.DataSheet4U.com P/N:PM1123 MX26LV160AT/AB START Set Up Sector Addr PLSCNT=1 OE#=VID, A9=VID, CE#=VIL A6=VIL Activate WE# Pulse Time Out 150us Set WE#=VIH, CE#=OE#=VIL A9 should remain VID Read from Sector No Addr=SA, A1=1, A6=0, A0=0 No Data=01H? PLSCNT=32? Yes Device Failed Protect Another Sector? ...
Page 37
... Figure 13. IN-SYSTEM SECTOR PROTECTION ALGORITHM WITH RESET#=VID www.DataSheet4U.com Increment PLSCNT P/N:PM1123 MX26LV160AT/AB START PLSCNT=1 RESET#=VID Wait 1us First Write Cycle=60H Yes Set up sector address Write 60H to sector address with A6=0, A1=1, A0=0 Wait 150us Verify sector protect : write 90H with A6=0, A1=1, A0=0 Read from sector address ...
Page 38
... Figure 14. IN-SYSTEM CHIP UNPROTECTION ALGORITHM WITH RESET#=VID www.DataSheet4U.com Increment PLSCNT P/N:PM1123 MX26LV160AT/AB START PLSCNT=1 RESET#=VID Wait 1us First Write Cycle=60H ? Yes All sector protected? Yes Set up first sector address Chip unprotect : write 60H with A6=1, A1=1, A0=0 Wait 50ms Verify chip unprotect ...
Page 39
... Figure 15. TIMING WAVEFORM FOR CHIP UNPROTECTION (A9, OE# Control) A1 12V Vcc 3V A9 www.DataSheet4U.com A6 12V Vcc 3V OE# WE# CE# Data A19-A12 P/N:PM1123 MX26LV160AT/AB tVLHT tVLHT tWPP 2 tOESP 39 Verify tVLHT 00H F0H tOE Sector Address REV. 1.1, NOV. 18, 2004 ...
Page 40
... Figure 16. CHIP UNPROTECTION ALGORITHM (A9, OE# Control) www.DataSheet4U.com Increment Sector Addr * It is recommended before unprotect whole chip, all sectors should be protected in advance. P/N:PM1123 MX26LV160AT/AB START Protect All Sectors PLSCNT=1 Set OE#=A9=VID, CE#=VIL, A6=1, A1=1, A0=0 Activate WE# Pulse Time Out 50ms Set OE#=CE#=VIL, A9=VID, A1=1, A0=0, A6=0 Set Up First Sector Addr ...
Page 41
... WRITE OPERATION STATUS FIGURE 17. DATA# POLLING ALGORITHM www.DataSheet4U.com P/N:PM1123 MX26LV160AT/AB Start Read Q7~Q0 Add.=VA( Data ? Yes Read Q7~Q0 Add.= Data ? (2) No FAIL NOTE : 1.VA=Valid address for programming 2.Q7 should be re-checked even Q5="1" because Q7 may change simultaneously with Q5. 41 Yes Yes Pass REV ...
Page 42
... FIGURE 18. TOGGLE BIT ALGORITHM www.DataSheet4U.com P/N:PM1123 MX26LV160AT/AB Start Read Q7-Q0 Read Q7-Q0 (Note 1) NO Toggle Bit Q6 = Toggle ? YES NO Q5= 1? YES Read Q7~Q0 Twice (Note 1,2) NO Toggle bit Q6= Toggle? YES Program/Erase Operation Not Complete,Write operation Complete Reset Command Note:1.Read toggle bit twice to determine whether or not it is toggling. ...
Page 43
... WE# Q7 Q0-Q6 tBUSY RY/BY# NOTES: 1. VA=Valid address. Figure shows are first status cycle after command sequence, last status read cycle, and array data read cycle. 2. CE# must be toggled when DATA# polling. P/N:PM1123 MX26LV160AT/AB tRC VA VA tACC tCE tOE tDF tOH Complement Complement ...
Page 44
... Q6/Q2 tBUSY RY/BY# NOTES: 1. VA=Valid address; not required for Q6. Figure shows first two status cycle after command sequence, last status read cycle, and array data read cycle. 2. CE# must be toggled when toggle bit toggling. P/N:PM1123 MX26LV160AT/AB tRC VA VA tACC tCE tOE tDF tOEH ...
Page 45
... RY/BY# Recovery Time (to CE#, OE# go low) Note: Not 100% tested FIGURE 21. RESET# TIMING WAVEFORM RY/BY# CE#, OE# RESET# RY/BY# CE#, OE# RESET# P/N:PM1123 MX26LV160AT/AB tRH tRP tReady2 Reset Timing NOT during Automatic Algorithms tReady1 tRP Reset Timing during Automatic Algorithms 45 Test Setup All Speed Options Unit ...
Page 46
... FIGURE 22. BYTE# TIMING WAVEFORM FOR READ OPERATIONS (BYTE# switching from byte mode to word mode) CE# OE# BYTE# Q0~Q14 Q15/A-1 P/N:PM1123 MX26LV160AT/AB Description CE# to BYTE# Switching Low or High BYTE# Switching Low to Output HIGH Z BYTE# Switching High to Output Active tELFH DOUT (Q0-Q7) VA tFHQV 46 ...
Page 47
... BYTE# TIMING WAVEFORM FOR READ OPERATIONS (BYTE# switching from word mode to byte mode) CE# www.DataSheet4U.com OE# BYTE# Q0~Q14 Q15/A-1 FIGURE 24. BYTE# TIMING WAVEFORM FOR PROGRAM OPERATIONS CE# WE# BYTE# P/N:PM1123 MX26LV160AT/AB tELFH DOUT (Q0-Q14) (Q0-Q7) DOUT VA (Q15) tFLQZ The falling edge of the last WE# signal tAS tAH 47 DOUT REV ...
Page 48
... RESET# Setup Time for Temporary Sector Unprotect Note: Not 100% tested www.DataSheet4U.com Figure 25. TEMPORARY SECTOR UNPROTECT TIMING DIAGRAM 12V RESET Vcc CE# WE# RY/BY# P/N:PM1123 MX26LV160AT/AB Program or Erase Command Sequence tVIDR tRSP 48 Test Setup All Speed Options Unit Min 500 ns Min 4 us ...
Page 49
... Figure 26. TEMPORARY SECTOR UNPROTECT ALGORITHM www.DataSheet4U.com P/N:PM1123 MX26LV160AT/AB Start RESET# = VID (Note 1) Perform Erase or Program Operation Operation Completed RESET# = VIH Temporary Sector Unprotect Completed(Note 2) Note : 1. All protected sectors are temporary unprotected. VID=11.5V~12.5V 2. All previously protected sectors are protected again. 49 REV. 1.1, NOV. 18, 2004 ...
Page 50
... VIH ADD A0 VIL VIH A1 VIL ADD VIH A2-A8 A10-A19 VIL CE# VIH VIL VIH WE# VIL VIH OE# VIL VIH DATA Q0-Q15 VIL P/N:PM1123 MX26LV160AT/AB tACC tACC tCE tOE tOH DATA OUT C2H/00C2H 50 tDF tOH DATA OUT C4H/49H (Byte) 22C4H/2249H (Word) REV. 1.1, NOV. 18, 2004 ...
Page 51
... QUERY COMMAND AND COMMON FLASH INTERFACE (CFI) MODE MX26LV160AT/AB is capable of operating in the CFI mode. This mode all the host system to determine the manufacturer of the device such as operating param- eters and configuration. Two commands are required in CFI mode. Query command of CFI mode is placed first, then the Reset command exits CFI mode ...
Page 52
... Erase suspend (0=not supported) Sector protect (0=not supported) Temporary sector unprotect (0=not supported) Sector protect/chip unprotect scheme (0=not supported) Simultaneous R/W operation (0=not supported) Burst mode type (0=not supported) Page mode type (0=not supported) P/N:PM1123 MX26LV160AT/AB Address Address (Byte Mode) (Word Mode ...
Page 53
... Input Voltage with respect to GND on ACC, OE#, RESET#, A9 Input Voltage with respect to GND on all power pins, Address pins, CE# and WE# Input Voltage with respect to GND on all I/O pins Current Includes all pins except VCC. Test conditions: VCC = 3.0V, one pin at a time. P/N:PM1123 MX26LV160AT/AB LIMITS MIN. TYP. (2) MAX. (3) 2.4 ...
Page 54
... ORDERING INFORMATION PART NO. MX26LV160ATMC-55 MX26LV160ATMC-70 MX26LV160ABMC-55 MX26LV160ABMC-70 MX26LV160ATTC-55 www.DataSheet4U.com MX26LV160ABTC-55 MX26LV160ATTC-70 MX26LV160ABTC-70 MX26LV160ATXBC-55 MX26LV160ABXBC-55 MX26LV160ATXBC-70 MX26LV160ABXBC-70 MX26LV160ATXEC-55 MX26LV160ABXEC-55 MX26LV160ATXEC-70 MX26LV160ABXEC-70 MX26LV160ATMC-55G MX26LV160ATMC-70G MX26LV160ABMC-55G MX26LV160ABMC-70G MX26LV160ATTC-55G MX26LV160ABTC-55G MX26LV160ATTC-70G MX26LV160ABTC-70G P/N:PM1123 MX26LV160AT/AB ACCESS OPERATING TIME (ns) Current MAX. (mA) Current MAX. (uA ...
Page 55
... PART NO. MX26LV160ATXBC-55G MX26LV160ABXBC-55G MX26LV160ATXBC-70G www.DataSheet4U.com MX26LV160ABXBC-70G MX26LV160ATXEC-55G MX26LV160ABXEC-55G MX26LV160ATXEC-70G MX26LV160ABXEC-70G P/N:PM1123 MX26LV160AT/AB ACCESS OPERATING TIME (ns) Current MAX. (mA) Current MAX. (uA STANDBY PACKAGE 100 48 Ball CSP (Ball size:0.3mm) 100 48 Ball CSP (Ball size:0.3mm) ...
Page 56
... PACKAGE INFORMATION www.DataSheet4U.com P/N:PM1123 MX26LV160AT/AB 56 REV. 1.1, NOV. 18, 2004 ...
Page 57
... P/N:PM1123 MX26LV160AT/AB 57 REV. 1.1, NOV. 18, 2004 ...
Page 58
... CSP (for MX26LV160ATXBC/ATXBI/ABXBC/ABXBI) www.DataSheet4U.com P/N:PM1123 MX26LV160AT/AB 58 REV. 1.1, NOV. 18, 2004 ...
Page 59
... CSP (for MX26LV160ATXEC/ATXEI/ABXEC/ABXEI) www.DataSheet4U.com P/N:PM1123 MX26LV160AT/AB 59 REV. 1.1, NOV. 18, 2004 ...
Page 60
... REVISION HISTORY Revision No. Description 1.0 1. Removed "Preliminary" added 44-SOP package information 3. To modified cycling time from 10K corrected protect/unprotect information in CFI table www.DataSheet4U.com P/N:PM1123 MX26LV160AT/AB Page P1 All P1,53 P52 60 Date NOV/15/2004 NOV/18/2004 REV. 1.1, NOV. 18, 2004 ...
Page 61
... MX26LV160AT/AB MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice. ...