LTC3589 Linear Technology, LTC3589 Datasheet - Page 20

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LTC3589

Manufacturer Part Number
LTC3589
Description
8-Output Regulator
Manufacturer
Linear Technology
Datasheet

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Soft-Start
Soft-start is accomplished by gradually increasing the
input reference voltage on each step-down switching
regulator from 0V to the dynamic reference DAC output
level at a rate of 2mV/μs. This allows each output to rise
slowly, helping minimize inrush current required to charge
up the regulator output capacitor. A soft-start cycle oc-
curs whenever a regulator is enabled either initially or
while powering up following a fault condition. A soft-start
cycle is not triggered by a change of operating modes or
a dynamic voltage slew. During soft-start the converter is
forced to pulse-skipping mode regardless of the settings
in the SCR1 command register.
LTC3589
OPERATION
Table 5. Step-Down Switching Regulator 2 Command Register
Settings
COMMAND
REGISTER[BIT]
SCR1[3-2]
OVEN[1]
SCR2[1]
VCCR[3]
VCCR[2]
VRRCR[3-2]
B2DTV1[5]
B2DTV1[4-0]
B2DTV2[4-0]
B2DTV2[5]
B2DTV2[6]
B2DTV2[7]
* Denotes Default Power-On Value
20
11001*
11001*
VALUE
00*
01
10
00*
01
10
11
0*
0*
0*
1
0*
1
0*
1
1
0*
1
0
1
1
1
SETTING
Pulse-Skipping Mode
Burst Mode Operation
Forced Continuous Mode
Disable
Enable
Wait for Output Below 300mV Before Enable
Enable immediately
Select Register B2DTV1 (V1) Reference
Select Register B2DTV2 (V2) Reference
Initiate Dynamic Voltage Slew
Reference Slew Rate = 0.88mV/μs
Reference Slew Rate = 1.75mV/μs
Reference Slew Rate = 3.5mV/μs
Reference Slew Rate = 7mV/μs
Force PGOOD Low When Slewing
Normal PGOOD Operation When Slewing
DAC Dynamic Target Voltage V1
DAC Dynamic Target Voltage V2
2.25MHz Switching Frequency
1.125MHz Switching Frequency
Switch on Clock Phase 1
Switch on Clock Phase 2
Shutdown Regulator 2 Normally
Keep Regulator 2 Alive
Switching EMI Control
The step-down switching regulators contain new patent
pending circuitry to limit the edge rate of the switch nodes
SW1, SW2, and SW3. This new circuitry controls the transi-
tion of the switch node over a period of a few nanoseconds,
signifi cantly reducing radiated EMI and conducted supply
noise while maintaining high effi ciency. Since slowing
the slew rate of the switch nodes causes effi ciency loss,
the slew rate of the step-down switching regulators is
adjustable using the I
6 and 7. Optimize effi ciency or EMI as necessary with four
different slew rate settings. The power-on default is the
fastest slew rate, highest effi ciency setting.
Table 6. Step-Down Switching Regulator 3 Command Register
Settings
COMMAND
REGISTER[BIT]
SCR1[5-4]
OVEN[2]
SCR2[2]
VCCR[5]
VCCR[4]
VRRCR[5-4]
B3DTV1[5]
B3DTV1[4-0]
B3DTV2[4-0]
B3DTV3[5]
B3DTV2[6]
B3DTV2[7]
* Denotes Default Power-On Value
11001*
11001*
VALUE
00*
01
10
00*
01
10
11
0*
0*
0*
1
0*
1
0*
1
1
0*
1
0
1
1
1
2
SETTING
Pulse-Skipping Mode
Burst Mode Operation
Forced Continuous Mode
Disable
Enable
Wait for Output Below 300mV Before Enable
Enable Immediately
Select Register B3DTV1 (V1) Reference
Select Register B3DTV2 (V2) Reference
Initiate Dynamic Voltage Slew
Reference Slew Rate = 0.88mV/μs
Reference Slew Rate = 1.75mV/μs
Reference Slew Rate = 3.5mV/μs
Reference Slew Rate = 7mV/μs
Force PGOOD Low When Slewing
Normal PGOOD Operation When Slewing
DAC Dynamic Target Voltage V1
DAC Dynamic Target Voltage V2
2.25MHz Switching Frequency
1.125MHz Switching Frequency
Switch on Clock Phase 1
Switch on Clock Phase 2
Shutdown Regulator 3 Normally
Keep Regulator 3 Alive
C command register B1DTV1 bits
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