LTC1403 Linear Technology, LTC1403 Datasheet - Page 15
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LTC1403
Manufacturer Part Number
LTC1403
Description
Serial 12-Bit/14-Bit/ 2.8Msps Sampling ADCs with Shutdown
Manufacturer
Linear Technology
Datasheet
1.LTC1403.pdf
(20 pages)
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APPLICATIO S I FOR ATIO
; 01-08-01 ******************************************************************
; Files: 014SI.ASM -> 1403A Sine wave collection with Serial Port interface
;
;
; first element at 1024, last element at 1023, two middles at 2047 and 0000
; unipolar mode
; Works 16 or 64 clock frames.
; negative edge BCLKR
; negative BFSR pulse
; -0 data shifted
; 1' cable from counter to CONV at DUT
; 2' cable from counter to CLK at DUT
; ***************************************************************************
start:
sinepeek:
wait
;
breceive:
;
bufull:
----------------Buffered Receive Interrupt Routine ------------------
.text
tim=#0fh
prd=#0fh
tcr = #10h
tspc = #0h
pmst = #01a0h
sp = #0700h
dp = #0
ar2 = #1800h
ar3 = #0800h
ar4 = #0h
call sineinit
call sineinit
goto
ifr = #10h
TC = bitf(@BSPCE,#4000h) ; check which half (bspce(bit14)) of buffer
if (NTC) goto bufull
bspce = #(2023h + 08000h); turn on halt for second half (bspce(bit15))
return_enable
--------------mask and shift input data ----------------------------
b = *ar3+ << -0
b = #03FFFh & b
*ar2+ = data(#0bh)
TC = (@ar2 == #02000h) ; output buffer is 2k starting at 1800h
if (TC) goto start
goto bufull
bvectors.asm
s2k14ini.asm
.width
.length 110
.title "sineb0 BSP in auto buffer mode"
.mmregs
.setsect ".text",
.setsect "vectors", 0x180,0
.setsect "buffer", 0x800,0
.setsect "result", 0x1800,0
wait
160
U
;this label seems necessary
;Make sure /PWRDWN is low at J1-9
;to turn off AC01 adc
; stop timer
; stop TDM serial port to AC01
; set up iptr. Processor Mode STatus register
; init stack pointer.
; data page
; pointer to computed receive buffer.
; pointer to Buffered Serial Port receive buffer
; reset record counter
; or more after the port comes out of reset.
; Double clutch the initialization to insure a proper
; reset. The external frame sync must occur 2.5 clocks
buffered mode to avoid standard mode bug.
2k buffer size.
U
0x500,0
; load acc b with BSP buffer and shift right -0
; mask out the TRISTATE bits with #03FFFh
;
; store B to out buffer and advance AR2 pointer
; restart if out buffer is at 1fffh
; clear interrupt flags
; if this still the first half get next half
W
;Set address of executable
;Set address of incoming 1403 data
;Set address of BSP buffer for clearing
;Set address of result for clearing
;.text marks start of code
U
LTC1403/LTC1403A
15
1403af