LTC1096 Linear Technology, LTC1096 Datasheet - Page 18

• Manufacturer Part Number: LTC1096
• Description: Micropower Sampling 8-Bit Serial I/O A/D Converters
• Manufacturer: Linear Technology

(Figure 6) and connect the center point to the MPU input.
It should be noted that to get full shutdown, the CS input
of the LTC1096/LTC1098 must be driven to the V
voltage. This would require adding a level shift circuit to
the CS signal in Figure 6.
LTC1096/LTC1096L
LTC1098/LTC1098L
A
BOARD LAYOUT CONSIDERATIONS
Grounding and Bypassing
The LTC1096(L)/LTC1098(L) should be used with an ana-
log ground plane and single point grounding techniques.
The GND pin should be tied directly to the ground plane.
18
COMMON MODE RANGE
DIFFERENTIAL INPUTS
Figure 6. Interfacing a 9V Powered LTC1096 to a 5V System
PPLICATI
LEVEL SHIFT
0V TO 6V
OPTIONAL
"+" INPUT
"–" INPUT
D
CLK
OUT
D
CS
IN
O
CS
+IN
–IN
GND
U
9V
LTC1096
S
D
V
I FOR ATIO
CLK
V
OUT
REF
U
CC
9V
50k
6V
4.7 F
Figure 7. LTC1098(L) “+” and “–” Input Settling Windows
W
50k
START
P1.4
P1.3
P1.2
(e.g. 8051)
MPU
U
LTC1096/98 • F06
SGL/DIFF
CC
5V
The V
a 1 F tantalum with leads as short as possible. If power
supply is clean, the LTC1096(L)/LTC1098(L) can also
operate with smaller 0.1 F surface mount or ceramic
bypass capacitors. All analog inputs should be referenced
directly to the single point ground. Digital inputs and
outputs should be shielded from and/or routed away from
the reference and analog circuitry.
SAMPLE-AND-HOLD
Both the LTC1096(L) and the LTC1098(L) provide a built-
in sample-and-hold (S&H) function to acquire signals.
The S&H of the LTC1096(L) acquires input signals from
“+” input relative to “–” input during the t
Figure 1). However, the S&H of the LTC1098(L) can
sample input signals in the single-ended mode or in the
differential inputs during the t
Single-Ended Inputs
The sample-and-hold of the LTC1098(L) allows conver-
sion of rapidly varying signals. The input voltage is sampled
during the t
interval begins as the bit preceding the MSBF bit is shifted
1ST BIT TEST "–" INPUT MUST
SAMPLE
SETTLE DURING THIS TIME
CC
"+" INPUT MUST
SETTLE DURING
pin should be bypassed to the ground plane with
THIS TIME
SMPL
t
SMPL
MSBF
time as shown in Figure 7. The sampling
HOLD
t
CONV
DON'T CARE
SMPL
time (see Figure 7).
LTC1096/8 • F07
B7
WAKEUP
time (see