LT1711 Linear Technology, LT1711 Datasheet - Page 9

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LT1711

Manufacturer Part Number
LT1711
Description
4ns/ 150MHz Dual Comparator with Independent Input/Output Supplies
Manufacturer
Linear Technology
Datasheet

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APPLICATIONS
The ground pin of the LT1715 can disturb the ground plane
potential while toggling due to the extremely fast on and
off times of the output stage. Therefore, using a ground for
input termination or filtering that is separate from the
LT1715 Pin 6 ground can be highly beneficial. For ex-
ample, a ground plane tied to Pin 6 and directly adjacent
to a 1" long input trace can capacitively couple 4mV of
disturbance into the input. In this scenario, cutting the
ground plane between the GND pin and the inputs will cut
the capacitance and the disturbance down substantially.
Figure 2 shows a typical topside layout of the LT1715 on
such a multilayer board. Shown is the topside metal etch
including traces, pin escape vias, and the land pads for an
MS10 LT1715 and its adjacent X7R 10nF bypass capaci-
tors in the 0805 case.
The ground trace from Pin 6 runs under the device up to
the bypass capacitor, shielding the inputs from the
outputs. Note the use of a common via for the LT1715 and
the bypass capacitors, which minimizes interference from
high frequency energy running around the ground plane or
power distribution traces.
The supply bypass should include an adjacent 10nF
ceramic capacitor and a 2.2 F tantalum capacitor no
farther than 5cm away; use more capacitance on + V
driving more than 4mA loads. To prevent oscillations, it is
helpful to balance the impedance at the inverting and
noninverting inputs; source impedances should be kept
low, preferably 1k or less.
The outputs of the LT1715 are capable of very high slew
rates. To prevent overshoot, ringing and other problems
with transmission line effects, keep the output traces
shorter than 10cm, or be sure to terminate the lines to
Figure 2. Typical Topside Metal for Multilayer PCB Layouts
U
INFORMATION
U
1715 F02
W
U
S
if
maintain signal integrity. The LT1715 can drive DC termi-
nations of 200 or more, but lower characteristic imped-
ance traces can be used with series termination or AC
termination topologies.
Channel Interactions
The LT1715’s two channels are designed to be entirely
independent. However, at frequencies approaching and
exceeding 100MHz, bond wire inductance begins to inter-
fere with overlapping switching edges on the two chan-
nels. Figure 3 shows one channel of the comparator
toggling at 100MHz with the other channel driven low with
the scope set to display infinite persistence. Jitter is
almost nonexistent. Figure 4 displays the same channel at
100MHz with infinite persistence, but the other channel of
the comparator is toggling as well at frequencies swept
from 60MHz to 160MHz. Jitter will occur as rising and
falling edges align for any non harmonic or non fundamen-
tal frequency of the high frequency signal.
OUT A
OUT A
Figure 4. 100MHz Jitter with Both Channels Driven
Figure 3. Clean 100MHz Toggling
5ns/DIV
5ns/DIV
1715 F03
1715 F04
LT1715
– 5V
1V/DIV
0V
– 5V
1V/DIV
0V
9

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