AD5293 Analog Devices, AD5293 Datasheet - Page 14

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AD5293

Manufacturer Part Number
AD5293
Description
Digital Potentiometer
Manufacturer
Analog Devices
Datasheet

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AD5293
ranging from 0 V to 1 LSB less than 30 V. Each LSB of voltage
is equal to the voltage applied across Terminal A and Terminal B,
divided by the 1,024 positions of the potentiometer divider. The
general equation defining the output voltage at V
to ground for any valid input voltage applied to Terminal A and
Terminal B is
In voltage divider mode, to optimize wiper position update rate,
it is recommended to disable the internal ±1% resistor tolerance
calibration feature by programming bit C2 of the control
register (able 9).
Operation of the digital potentiometer in the divider mode
results in a more accurate operation over temperature. Unlike
the rheostat mode, the output voltage is dependent mainly on
the ratio of the internal resistors R
absolute values. Therefore, the temperature drift reduces to
5 ppm/°C.
EXT_CAP CAPACITOR
A 1µF capacitor to GND must be connected to the EXT_CAP
pin (Figure 10) on power-up and throughout the operation of
the AD5293.
TERMINAL VOLTAGE OPERATING RANGE
The AD5293’s positive V
define the boundary conditions for proper 3-terminal digital
potentiometer operation. Supply signals present on Terminals
A, B, and W that exceed V
forward-biased diodes (see Figure 11).
V
W
(
D
Figure 10. Hardware setup for EXT_CAP pin
)
=
, 1
024
D
DD
DD
×
and negative V
or V
V
A
+
SS
WA
are clamped by the internal
, 1
and R
024
, 1
024
SS
WB
power supplies
and not the
D
W
×
with respect
V
B
Rev. PrA | Page 14 of 15
(3)
digital ground reference. To minimize the digital ground
bounce, the AD5293 ground terminal should be joined
remotely to the common ground. The digital input control
signals to the AD5293 must be referenced to the device ground
pin (GND), and satisfy the logic level defined in the
Specifications section.
Power-Up Sequence
Because there are diodes to limit the voltage compliance at
Terminals A, B, and W (Figure 11), it is important to power
V
and W. Otherwise, the diode is forward-biased such that
V
sequence is GND, V
and V
not important as long as they are powered after V
V
Regardless of the power-up sequence and the ramp rates of the
power supplies, once V
activates, which restores midscale to the RDAC register.
The ground pin of the AD5293 device is primarily used as a
DD
DD
LOGIC
/V
/V
W
.
SS
SS
. The order of powering V
Figure 11. Maximum Terminal Voltages Set by V
first before applying any voltage to Terminals A, B,
are powered unintentionally. The ideal power-up
DD
Preliminary Technical Data
/V
LOGIC
SS
, V
is powered, the power-on preset
LOGIC
, digital inputs, and V
A
, V
B
, V
W
, and digital inputs is
DD
V
A
W
V
B
SS
DD
DD
and V
/V
SS
SS
A
, V
and
B
,

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