74HCT534D,652 NXP Semiconductors, 74HCT534D,652 Datasheet - Page 8

• Manufacturer Part Number: 74HCT534D,652
• Description: IC OCT D F-F POS-EDG TRIG 20SOIC
• Manufacturer: NXP Semiconductors
• Series: 74HCTr
• Type: D-Type Busr

Specifications of 74HCT534D,652

• Package / Case: 20-SOIC (7.5mm Width)
• Function: Standard
• Output Type: Tri-State Inverted
• Number Of Elements: 1
• Number Of Bits Per Element: 8
• Frequency - Clock: 40MHz
• Delay Time - Propagation: 13ns
• Trigger Type: Positive Edge
• Current - Output High, Low: 6mA, 6mA
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Number Of Circuits: 1
• Logic Family: HCT
• Logic Type: D-Type Edge Triggered Flip-Flop
• Polarity: Inverting
• Input Type: Single-Ended
• Propagation Delay Time: 13 ns
• High Level Output Current: - 6 mA
• Supply Voltage (max): 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Supply Voltage (min): 4.5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 74HCT534D; 74HCT534D; 933713950652

Philips Semiconductors
Table 8:
GND = 0 V; V
[1]
[2]
9397 750 13817
Product data sheet
Symbol
t
t
t
t
t
f
C
T
t
t
t
t
t
t
t
f
T
t
t
t
t
t
t
t
f
PHZ
THL
W
su
h
max
PHL
PZH
PHZ
THL
W
su
h
max
PHL
PZH
PHZ
THL
W
su
h
max
amb
amb
PD
, t
, t
, t
, t
, t
, t
, t
, t
, t
, t
C
P
f
f
C
V
N = number of inputs switching;
The condition is V
i
o
(C
D
CC
= 40 C to +85 C
= 40 C to +125 C
PD
= input frequency in MHz;
L
TLH
TLH
TLH
PLZ
PLH
PZL
PLZ
PLH
PZL
PLZ
= output frequency in MHz;
= output load capacitance in pF;
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in Volts;
PD
V
Dynamic characteristics
CC
CC
Parameter
3-state output disable time OE to Qn
output transition time
clock pulse width HIGH or LOW
set-up time Dn to CP
hold time Dn to CP
maximum clock pulse frequency
power dissipation capacitance per
flip-flop
propagation delay CP to Qn
3-state output enable time OE to Qn
3-state output disable time OE to Qn
output transition time
clock pulse width HIGH or LOW
set-up time Dn to CP
hold time Dn to CP
maximum clock pulse frequency
propagation delay CP to Qn
3-state output enable time OE to Qn
3-state output disable time OE to Qn
output transition time
clock pulse width HIGH or LOW
set-up time Dn to CP
hold time Dn to CP
maximum clock pulse frequency
V
2
CC
= 4.5 V; t
f
2
o
) = sum of the outputs.
I
= GND to V
f
i
N + (C
r
= t
f
= 6 ns; C
L
CC
V
CC
1.5 V.
2
…continued
L
= 50 pF; see
f
o
) where:
5 V octal D-type flip-flop; positive-edge trigger; inverting; 3-state
Rev. 03 — 18 October 2004
Figure 9
Conditions
see
see
see
see
see
see
see
see
see
see
see
see
see
see
see
see
see
see
see
see
see
see
D
C
C
in W).
L
L
Figure 7
Figure 6
Figure 6
Figure 8
Figure 8
Figure 6
Figure 6
Figure 7
Figure 7
Figure 6
Figure 6
Figure 8
Figure 8
Figure 6
Figure 6
Figure 7
Figure 7
Figure 6
Figure 6
Figure 8
Figure 8
Figure 6
= 50 pF; V
= 15 pF; V
CC
CC
= 4.5 V
= 5 V
[1] [2]
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Min
-
-
23
12
5
22
-
-
-
-
-
-
29
15
5
18
-
-
-
-
35
18
5
15
74HCT534
Typ
18
5
14
4
36
40
19
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1
Max
30
12
-
-
-
-
-
-
38
38
38
15
-
-
-
-
45
45
45
18
-
-
-
-
Unit
ns
ns
ns
ns
ns
MHz
MHz
pF
ns
ns
ns
ns
ns
ns
ns
MHz
ns
ns
ns
ns
ns
ns
ns
MHz
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