74HCT534D,652 NXP Semiconductors, 74HCT534D,652 Datasheet

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74HCT534D,652

Manufacturer Part Number
74HCT534D,652
Description
IC OCT D F-F POS-EDG TRIG 20SOIC
Manufacturer
NXP Semiconductors
Series
74HCTr
Type
D-Type Busr
Datasheet

Specifications of 74HCT534D,652

Package / Case
20-SOIC (7.5mm Width)
Function
Standard
Output Type
Tri-State Inverted
Number Of Elements
1
Number Of Bits Per Element
8
Frequency - Clock
40MHz
Delay Time - Propagation
13ns
Trigger Type
Positive Edge
Current - Output High, Low
6mA, 6mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Number Of Circuits
1
Logic Family
HCT
Logic Type
D-Type Edge Triggered Flip-Flop
Polarity
Inverting
Input Type
Single-Ended
Propagation Delay Time
13 ns
High Level Output Current
- 6 mA
Supply Voltage (max)
5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Supply Voltage (min)
4.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74HCT534D
74HCT534D
933713950652
1. General description
2. Features
3. Quick reference data
The 74HCT534 is a high-speed Si-gate CMOS device and is pin compatible with low
power Schottky TTL (LSTTL). The 74HCT534 is specified in compliance with JEDEC
standard no. 7A.
The 74HCT534 is an octal D-type flip-flop featuring separate D-type inputs for each
flip-flop and inverting 3-state outputs for bus oriented applications. A clock (CP) and an
output enable (OE) input are common to all flip-flops.
The 8 flip-flops will store the state of their individual D-inputs that meet the set-up and hold
times requirements on the LOW-to-HIGH CP transition. When OE is LOW, the contents of
the 8 flip-flops are available at the outputs. When OE is HIGH, the outputs go to the
high-impedance OFF-state. Operation of the OE input does not affect the state of the
flip-flops.
The 74HCT534 is functionally identical to the 74HCT374, but has inverted outputs.
Table 1:
GND = 0 V; T
[1]
Symbol
t
f
C
C
PHL
max
I
PD
74HCT534
5 V octal D-type flip-flop; positive-edge trigger; inverting;
3-state
Rev. 03 — 18 October 2004
3-state inverting outputs for bus oriented applications
8-bit positive-edge triggered register
Common 3-state output enable input.
, t
C
P
f
f
C
i
o
D
PD
= input frequency in MHz;
L
PLH
= output frequency in MHz;
= output load capacitance in pF;
= C
is used to determine the dynamic power dissipation (P
PD
Parameter
propagation delay
CP to Qn
maximum clock
frequency
input capacitance
power dissipation
capacitance per flip-flop
Quick reference data
amb
V
CC
= 25 C; t
2
f
i
N + (C
r
= t
f
L
= 6 ns.
V
CC
Conditions
C
C
C
2
L
L
L
= 15 pF; V
= 15 pF; V
= 50 pF; V
f
o
) where:
CC
CC
CC
= 5 V
= 5 V
= 4.5 V
D
in W).
[1] [2]
Product data sheet
Min
-
-
-
-
Typ
13
40
3.5
19
Max
-
-
-
-
Unit
ns
MHz
pF
pF

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74HCT534D,652 Summary of contents

Page 1

V octal D-type flip-flop; positive-edge trigger; inverting; 3-state Rev. 03 — 18 October 2004 1. General description The 74HCT534 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). The 74HCT534 is ...

Page 2

Philips Semiconductors V = supply voltage in Volts number of inputs switching [2] The condition Ordering information Table 2: Ordering information Type number Package Temperature range Name 74HCT534N +125 ...

Page 3

Philips Semiconductors Fig 2. Logic symbol ...

Page 4

Philips Semiconductors 6. Pinning information 6.1 Pinning Fig 5. Pin configuration. 6.2 Pin description Table 3: Symbol GND 9397 750 ...

Page 5

Philips Semiconductors 7. Functional description 7.1 Function table Table 4: Operating mode Load and read register Load register and disable outputs [ HIGH voltage level HIGH voltage level one set-up time prior to the LOW-to-HIGH CP ...

Page 6

Philips Semiconductors Table 6: Symbol amb 10. Static characteristics Table 7: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter ...

Page 7

Philips Semiconductors Table 7: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter I 3-state OFF current OZ I quiescent supply current CC I additional quiescent supply CC current per input pin ...

Page 8

Philips Semiconductors Table 8: Dynamic characteristics GND = 4 ns Symbol Parameter 3-state output disable time PHZ PLZ t , ...

Page 9

Philips Semiconductors 12. Waveforms Fig 6. Waveforms showing the clock (CP) to output (Qn) propagation delays, the clock Fig 7. Waveforms showing the 3-state enable and disable times. 9397 750 13817 Product data sheet 5 V octal D-type flip-flop; positive-edge ...

Page 10

Philips Semiconductors Fig 8. Waveforms showing the data set-up and hold times for Dn input. Fig 9. Load circuitry for switching times. 9397 750 13817 Product data sheet 5 V octal D-type flip-flop; positive-edge trigger; inverting; 3-state V CP input ...

Page 11

Philips Semiconductors 13. Package outline DIP20: plastic dual in-line package; 20 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. min. max. ...

Page 12

Philips Semiconductors SO20: plastic small outline package; 20 leads; body width 7 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. ...

Page 13

Philips Semiconductors 14. Revision history Table 9: Revision history Document ID Release date 74HCT534_3 20041018 • Modifications: The format of this data sheet has been redesigned to comply with the new presentation and information standard of Philips Semiconductors • Information ...

Page 14

Philips Semiconductors 15. Data sheet status [1] Level Data sheet status Product status I Objective data Development II Preliminary data Qualification III Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. ...

Page 15

Philips Semiconductors 19. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...

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