74LVT574PW,118 NXP Semiconductors, 74LVT574PW,118 Datasheet
74LVT574PW,118
Specifications of 74LVT574PW,118
74LVT574PW-T
74LVT574PW-T
935176370118
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74LVT574PW,118 Summary of contents
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V octal D-type flip-flop; 3-state Rev. 04 — 11 September 2008 1. General description The 74LVT574; 74LVTH574 is a high-performance product designed for V 3.3 V. This device is an 8-bit, edge triggered register coupled to eight ...
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... NXP Semiconductors 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name 74LVT574D +85 C 74LVTH574D 74LVT574DB +85 C 74LVTH574DB 74LVT574PW +85 C 74LVTH574PW 74LVT574BQ + Functional diagram Fig 1. Logic symbol Fig 3. Logic diagram 74LVT_LVTH574_4 Product data sheet Description SO20 plastic small outline package; 20 leads; ...
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... NXP Semiconductors 5. Pinning information 5.1 Pinning 74LVT574 74LVTH574 GND 10 001aae758 Fig 4. Pin configuration for SO20, and (T)SSOP20 5.2 Pin description Table 2. Pin description Symbol Pin GND 19, 18, 17, 16, 15, 14, 13 74LVT_LVTH574_4 Product data sheet 74LVT574; 74LVTH574 (1) The die substrate is attached to this pad using conductive die attach material ...
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... NXP Semiconductors 6. Functional description 6.1 Function table [1] Table 3. Function table Operating mode Control OE Load and read register L Hold L Disable outputs H [ HIGH voltage level LOW voltage level; = LOW-to-HIGH clock transition HIGH voltage level one setup time prior to the LOW-to-HIGH clock transition LOW voltage level one setup time prior to the LOW-to-HIGH clock transition; ...
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... NXP Semiconductors 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter V supply voltage CC V input voltage I V HIGH-level input voltage IH V LOW-level input voltage IL I HIGH-level output current OH I LOW-level output current OL T ambient temperature amb t/ V input transition rise and fall rate 9 ...
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... NXP Semiconductors Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter I bus hold LOW BHLO overdrive current I power-up/power-down O(pu/pd) output current I OFF-state output current OZ I supply current CC I additional supply current CC C input capacitance I C output capacitance ...
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... NXP Semiconductors Table 7. Dynamic characteristics Voltages are referenced to ground (GND = 0 V); for test circuit see Symbol Parameter t OFF-state to LOW propagation delay OE to Qn; see PZL t HIGH to OFF-state propagation delay OE to Qn; see PHZ t LOW to OFF-state propagation delay OE to Qn; see PLZ t set-up time su t hold time ...
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... NXP Semiconductors 11. Waveforms CP input Qn output Measurement points are given in V and V are typical voltage output levels that occur with the output load Fig 6. Propagation delay clock input (CP) to output (Qn), pulse width clock (CP) and maximum clock frequency input M GND t PZH output V GND ...
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... NXP Semiconductors Table 8. Measurement points Input Output 1.5 V 1.5 V Test data is given in Table Definitions test circuit Load resistance Load capacitance including jig and probe capacitance Termination resistance should be equal to output impedance Test voltage for switching times. EXT Fig 10. Load circuitry for switching times Table 9 ...
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... NXP Semiconductors 12. Package outline SO20: plastic small outline package; 20 leads; body width 7 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.3 2.45 2.65 mm 0.25 0.1 2.25 0.012 0.096 0.1 inches 0.01 0.004 0.089 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors SSOP20: plastic shrink small outline package; 20 leads; body width 5 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.21 1. 0.25 0.05 1.65 Note 1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. OUTLINE VERSION IEC SOT339-1 Fig 12. Package outline SOT339-1 (SSOP20) ...
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... NXP Semiconductors TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 x 4.5 x 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...
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... Release date 74LVT_LVTH574_4 20080911 • Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Section 3 “Ordering information” added. ...
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... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Functional description . . . . . . . . . . . . . . . . . . . 4 6.1 Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 13 Abbreviations ...