AD9639 Analog Devices, Inc., AD9639 Datasheet - Page 5

• Manufacturer Part Number: AD9639
• Description: Quad, 12-bit, 170 Msps/210 Msps Serial Output 1.8 V Adc
• Manufacturer: Analog Devices, Inc.

DIGITAL SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, T
otherwise noted.
Table 3.
Parameter
CLOCK INPUTS (CLK+, CLK−)
LOGIC INPUTS (PDWN, CSB, SDI/SDIO,
LOGIC OUTPUT (SDO)
DIGITAL OUTPUTS (DOUT + x, DOUT − x)
1
2
See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for definitions and details on how these tests were completed.
Specified for 13 SDI/SDIO pins on the same SPI bus.
Logic Compliance
Differential Input Voltage
Input Voltage Range
Internal Common-Mode Bias
Input Common-Mode Voltage
High Level Input Voltage (V
Low Level Input Voltage (V
High Level Input Current (I
Low Level Input Current (I
Differential Input Resistance
Input Capacitance
SCLK, RESET, PGMx)
Logic 1 Voltage
Logic 0 Voltage
Logic 1 Input Current (CSB)
Logic 0 Input Current (CSB)
Logic 1 Input Current
Logic 0 Input Current
Input Resistance
Input Capacitance
Logic 1 Voltage
Logic 0 Voltage
Logic Compliance
Differential Output Voltage
Common-Mode Voltage
(PDWN, SDI/SDIO, SCLK,
RESET, PGMx)
(PDWN, SDI/SDIO, SCLK,
RESET, PGMx)
1
2
IL
IH
IL
)
IH
)
)
)
MIN
= −40°C, T
Temp
Full
Full
Full
Full
Full
Full
Full
Full
Full
25°C
25°C
Full
Full
Full
Full
Full
Full
25°C
25°C
Full
Full
Full
Full
MAX
Min
0.2
AVDD −
0.3
1.1
1.2
0
−10
−10
16
0.8 ×
AVDD
1.2
0
= +85°C, 1.25 V p-p differential input, AIN = −1.0 dBFS, DCS enabled, unless
LVPECL/LVDS/CMOS
AD9639BCPZ-170
Rev. 0 | Page 5 of 36
Typ
20
4
0
−60
55
0
30
4
CML
0.8
1.2
DRVDD/2
Max
6
AVDD +
1.6
AVDD
3.6
0.8
+10
+10
24
0.2 ×
AVDD
AVDD +
0.3
0.3
Min
0.2
AVDD −
0.3
1.1
1.2
0
−10
−10
16
0.8 ×
AVDD
1.2
0
LVPECL/LVDS/CMOS
AD9639BCPZ-210
Typ
1.2
20
4
0
−60
55
0
30
4
CML
0.8
DRVDD/2
Max
6
AVDD +
1.6
AVDD
3.6
0.8
+10
+10
24
0.2 ×
AVDD
AVDD +
0.3
0.3
AD9639
Unit
V p-p
V
kΩ
pF
V
V
μA
kΩ
pF
V
V
V
V
V
μA
μA
μA
μA
μA
V
V