ST62T42B ST Microelectronics, ST62T42B Datasheet - Page 19

• Manufacturer Part Number: ST62T42B
• Description: 8-BIT OTP/EPROM MCU WITH LCD DRIVER / EEPROM AND A/D CONVERTER
• Manufacturer: ST Microelectronics

3.2 RESETS
The MCU can be reset in three ways:
– by the external Reset input being pulled low;
– by Power-on Reset;
– by the digital Watchdog peripheral timing out.
3.2.1 RESET Input
The RESET pin may be connected to a device of
the application board in order to reset the MCU if
required. The RESET pin may be pulled low in
RUN, WAIT or STOP mode. This input can be
used to reset the MCU internal state and ensure a
correct start-up procedure. The pin is active low
and features a Schmitt trigger input. The internal
Reset signal is generated by adding a delay to the
external signal. Therefore even short pulses on
the RESET pin are acceptable, provided V
completed its rising phase and that the oscillator is
running correctly (normal RUN or WAIT modes).
The MCU is kept in the Reset state as long as the
RESET pin is held low.
If RESET activation occurs in the RUN or WAIT
modes, processing of the user program is stopped
(RUN mode only), the Inputs and Outputs are con-
figured as inputs with pull-up resistors and the
main Oscillator is restarted. When the level on the
RESET pin then goes high, the initialization se-
quence is executed following expiry of the internal
delay period.
If RESET pin activation occurs in the STOP mode,
the oscillator starts up and all Inputs and Outputs
are configured as inputs with pull-up resistors.
When the level of the RESET pin then goes high,
the initialization sequence is executed following
expiry of the internal delay period.
3.2.2 Power-on Reset
The function of the POR circuit consists in waking
up the MCU at an appropriate stage during the
power-on sequence. At the beginning of this se-
quence, the MCU is configured in the Reset state:
all I/O ports are configured as inputs with pull-up
resistors and no instruction is executed. When the
power supply voltage rises to a sufficient level, the
oscillator starts to operate, whereupon an internal
delay is initiated, in order to allow the oscillator to
fully stabilize before executing the first instruction.
The initialization sequence is executed immediate-
ly following the internal delay.
DD
has
The internal delay is generated by an on-chip coun-
ter. The internal reset line is released 2048 internal
clock cycles after release of the external reset.
Notes:
To ensure correct start-up, the user should take
care that the reset signal is not released before the
V
the chosen frequency (see Recommended Oper-
ating Conditions).
A proper reset signal for a slow rising V
can generally be provided by an external RC net-
work connected to the RESET pin.
Figure 10. Reset and Interrupt Processing
DD
level is sufficient to allow MCU operation at
YES
FROM RESET LOCATIONS
FETCH INSTRUCTION
INT LATCH CLEARED
ON ADDRESS BUS
NMI MODE FLAGS
( IF PRESENT )
IS RESET STILL
NMI MASK SET
PUT FFEH
LOAD PC
PRESENT?
SELECT
FFE/FFF
RESET
NO
ST62T42B/E42B
DD
VA000427
supply
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