MT90502 Zarlink Semiconductor, Inc., MT90502 Datasheet - Page 6

• Manufacturer Part Number: MT90502
• Description: Multi-Channel AAL2 SAR
• Manufacturer: Zarlink Semiconductor, Inc.

MT90502
Pin Description (continued)
6
EPBGA Pin
J1, K4, K3,
H1, J3, J2,
M25, M24,
G25, G24,
C25, D25,
F24, G26,
G23, H24,
N25, P24,
P23, R24,
U23, U26,
E26, E25,
E24, F26,
K26, K24,
R25, T26,
V23, V24,
V26, W23
L23, L24,
J26, J25,
K2, K1
A22
A21
A24
B22
A17
A16
D18
B20
C20
C18
A18
D20
C19
B21
AF2
H2
L2
L3
ct_frame_a
ct_frame_b
2. rxc_clav
1. rxc_clav
mem_clk_i
1. rxc_enb
2. rxc_enb
rxc_d[7:0]
ct_netref1
ct_netref2
ct_d[31:0]
rxc_prty
ct_c8_a
ct_c8_b
frcomp
sclkx2
Name
ct_mc
Preliminary Information
c16p
c16n
sclk
c2
c4
1. UTOPIA port C RX Enable (in ATM)
2. UTOPIA port C RX Cell Available (in PHY)
1. UTOPIA port C RX Cell Available (in ATM)
2. UTOPIA port C RX Enable (in PHY)
UTOPIA port C RX Data bus
UTOPIA port C RX Parity
H.110 compatible 8MHz clock A
H.110 compatible 8MHz clock B
H.110 compatible Frame A
H.110 compatible Frame B
H.110 compatible Netref 1
H.110 compatible Netref 2
H.110 compatible Message Channel. If this pin is connected to the H100 bus,
gpio[2] must be used to drive it.
H.110 compatible serial data bus
SCBUS system clock
SCBUS system clock x 2
H-MVIP 16 MHz clock
H-MVIP 16 MHz clock
Master clock: memory clock (common to both bank A and B) and is employed as
the internal master clock.
MVIP 90-bit clock
MVIP 90-bit clock x 2
compatibility frame pulse
Memory Interface Pins
H.110 Interface Pins
Description (see notes 1-8)