ATF1532AE ATMEL Corporation, ATF1532AE Datasheet - Page 12

• Manufacturer Part Number: ATF1532AE
• Description: (ATF15xxAE) 2nd Generation EE Complex Programmable Logic Devices
• Manufacturer: ATMEL Corporation

JTAG
Boundary-scan
Cell (BSC)
Testing
Boundary-scan
Definition
Language
(BSDL) Models
12
ATF15xxAE Family
The ATF15xx Family has four dedicated input pins and a number of I/O pins depending on the
device type and package type selected. Each input pin and I/O pin has a boundary-scan cell
(BSC) which supports boundary-scan testing as described in detail by IEEE Standard 1149.1.
A typical BSC consists of three capture registers or scan registers and up to two update regis-
ters. There are two types of BSCs, one for input or I/O pin, and one for the macrocells. The
BSCs in the device are chained together through the (BST) capture registers. Input to the cap-
ture register chain is fed in from the TDI pin while the output is directed to the TDO pin.
Capture registers are used to capture active device data signals, to shift data in and out of the
device and to load data into the update registers. Control signals are generated internally by
the JTAG TAP controller.
Note:
These are now available in all package types via the Atmel web site. These models conform to
the IEEE 1149.1 standard and can be used for Boundary-scan Test Operation of the ATF15xx
Family.
The BSC configuration for the input and I/O pins and macrocells are shown below.
Device
ATF1502AE
ATF1504AE
ATF1508AE
ATF1516AE
ATF1532AE
Shaded data is preliminary and subject to change without notice.
Register Length
Boundary-Scan
1232
192
352
672
96
MSB
0000,0001,0101,0100,0010,0000,0011,1111
0000,0001,0101,0100,0100,0000,0011,1111
0000,0001,0101,0100,1000,0000,0011,1111
0000,0001,0101,0101,0000,0000,0011,1111
0000,0001,0101,0110,0000,0000,0011,1111
IDCODE
2398E–12/01
LSB