MT28F128J3FS-12 ET Micron, MT28F128J3FS-12 ET Datasheet - Page 34
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MT28F128J3FS-12 ET
Manufacturer Part Number
MT28F128J3FS-12 ET
Description
128Mb Q-Flash - OBSOLETE
Manufacturer
Micron
Datasheet
1.MT28F128J3FS-12_ET.pdf
(55 pages)
- Current page: 34 of 55
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MT28F640J3.fm – Rev. N 3/05 EN
ERASE Command 20h,
Figure 12: BLOCK ERASE Flowchart
Issue Single BLOCK
Write Confirm D0h
Block(s) Complete
Check if Desired
Block Address
Block Address
Read Status
Erase Flash
Full Status
Register
SR7 =
Start
1
No
Suspend Erase
No
Yes
Suspend
Erase Loop
34
BUS OPERATION COMMAND
WRITE
WRITE
READ
STANDBY
Toggling OE# (LOW to HIGH to LOW) updates the status register.
To ensure the availability of correct status, please follow the
timings shown in Figure 20 on page 50. This can be done in place
of issuing the READ STATUS REGISTER command. Repeat for
subsequent ERASE operations.
The erase confirm byte must follow erase setup.
This device does not support erase queuing.
Full status check can be done after all erase and write sequences
complete. Write FFh after the last operation to reset the device
to read array mode.
Micron Technology, Inc., reserves the right to change products or specifications without notice.
ERASE BLOCK
ERASE
CONFIRM
128Mb, 64Mb, 32Mb
Q-FLASH MEMORY
COMMENTS
Data = 20h
Addr = Block Address
Data = D0h
Addr = Block Address
Status register data with
the device enabled; OE#
LOW updates SR
Addr = X
Check SR7
1 = ISM Ready
0 = ISM Busy
©2000 Micron Technology. Inc.
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