HMP525F7FFP4C-xx Hynix Semiconductor, HMP525F7FFP4C-xx Datasheet - Page 6

• Manufacturer Part Number: HMP525F7FFP4C-xx
• Description: 240pin Fully Buffered DDR2 SDRAM DIMMs
• Manufacturer: Hynix Semiconductor

Rev 1.2 / Feb. 2009
FUNCTIONAL BLOCK DIAGRAM
1GB(128Mbx72) ECC FB-DIMM
Notes :
1. DQ-to-I/O wiring may be changed within a byte.
2. There are two physical copies of each address/command/control/clock.
S C L
D Q 0
D Q 1
D Q 2
D Q 3
D Q 4
D Q 5
D Q 6
D Q 7
D Q 1 0
D Q 1 1
D Q 1 2
D Q 1 3
D Q 1 4
D Q 1 5
D Q 2 3
D Q 1 6
D Q 1 7
D Q 1 8
D Q 1 9
D Q 2 0
D Q 2 1
D Q 2 2
D Q 9
D Q 3 2
D Q 3 3
D Q 3 4
D Q 3 5
D Q 3 6
D Q 3 7
D Q 3 8
D Q 3 9
D Q 8
D Q 2 4
D Q 2 5
D Q 2 6
D Q 2 7
D Q 2 8
D Q 2 9
D Q 3 0
D Q 3 1
/D Q S 2
A ll a d d re s s/ c o m m a n d /c o n tro l/c lo c k
W P
D Q S 2
D Q S 1 1
/D Q S 4
/D Q S 1
/D Q S 3
D Q S 4
D Q S 1 3
S C L
D Q S 3
D Q S 1
D Q S 1 0
D Q S 1 2
/D Q S
D Q S 9
D Q S
/S 0
S A 0 S A 1
A 0
S e ria l P D
U 0
A 1
R D Q S
I / O 0
I / O 1
I / O 2
I / O 3
I/ O 4
I / O 5
I / O 6
I / O 7
R D Q S
I / O 0
I / O 1
I / O 2
I / O 3
I/ O 4
I / O 5
I / O 6
I / O 7
R D Q S
I/ O 0
I/ O 1
I/ O 2
I/ O 3
I / O 4
I/ O 5
I/ O 6
I/ O 7
R D Q S
I/ O 0
I/ O 1
I/ O 2
I/ O 3
I / O 4
I/ O 5
I/ O 6
I/ O 7
R D Q S
I / O 0
I / O 1
I / O 2
I / O 3
I/ O 4
I / O 5
I / O 6
I / O 7
D M
D M
D M
D M
D M
S A 2
S D A
A 2
/R D Q S
/R D Q S
/R D Q S
/R D Q S
/R D Q S
N U
N U
N U
N U
N U
D0
D1
D2
/C S
/C S
D3
/C S
/C S
/C S
D 4
D Q S /D Q S
D Q S /D Q S
D Q S /D Q S
D Q S /D Q S
D Q S /D Q S
S D A
V D D S P D
V R E F
V C C
/S 1
I / O 4
I / O 4
V D D
R D Q S
I/ O 0
I/ O 1
I/ O 2
I/ O 3
I / O 4
I/ O 5
I/ O 6
I/ O 7
R D Q S
I/ O 0
I/ O 1
I/ O 2
I/ O 3
I / O 4
I/ O 5
I/ O 6
I/ O 7
R D Q S
I / O 0
I / O 1
I / O 2
I / O 3
I / O 5
I / O 6
I / O 7
R D Q S
I / O 0
I / O 1
I / O 2
I / O 3
I / O 5
I / O 6
I / O 7
R D Q S
I/ O 0
I/ O 1
I/ O 2
I/ O 3
I / O 4
I/ O 5
I/ O 6
I/ O 7
V T T
V S S
D M
D M
D M
D M
D M
/R D Q S
/R D Q S
/R D Q S
/R D Q S
/R D Q S
N U
N U
N U
N U
N U
V
T T
D 1 3
D9
D1 0
/C S
/C S
/C S
/C S
/C S
D1 1
D1 2
z
D Q S /D Q S
D Q S /D Q S
D Q S /D Q S
D Q S /D Q S
D Q S /D Q S
1
240pin Fully Buffered DDR2 SDRAM DIMMs
A M B
T e rm in a to rs
D O -D 1 7 , A M B
D O -D 1 7
D O -D 1 7 ,S P D , A M B
S e ria l P D ,A M B
D Q 5 6
D Q 5 7
D Q 5 8
D Q 5 9
D Q 6 0
D Q 6 1
D Q 6 2
D Q 4 0
D Q 4 1
D Q 4 2
D Q 4 3
D Q 4 4
D Q 4 5
D Q 4 6
D Q 6 3
D Q 4 7
D Q 4 8
D Q 4 9
D Q 5 0
D Q 5 1
D Q 5 2
D Q 5 3
D Q 5 4
D Q 5 5
C B0
C B1
C B2
C B3
C B4
C B5
C B6
C B7
/D Q S 8
/D Q S 6
D Q S 1 5
/D Q S 7
D Q S 8
D Q S 1 7
D Q S 6
D Q S 1 6
D Q S 7
/D Q S 5
D Q S 1 4
D Q S 5
/D Q S 0 -/D Q S 8
D Q S 0 -D Q S 1 7
R D Q S
I / O 0
I / O 1
I / O 2
I / O 3
I / O 4
I / O 5
I / O 6
I / O 7
R D Q S
I / O 0
I / O 1
I / O 2
I / O 3
I / O 4
I / O 5
I / O 6
I / O 7
R D Q S
I / O 0
I / O 1
I / O 2
I / O 3
I / O 4
I / O 5
I / O 6
I / O 7
R D Q S
I / O 0
I / O 1
I / O 2
I / O 3
I / O 4
I / O 5
I / O 6
I / O 7
D M
D M
D M
D M
/P N 0 -/P N 1 3
D Q 0 -D Q 6 3
/P S 0 -/P S 9
P N 0 -P N 1 3
S C K , /S C K
C B 0 -C B 7
S A 0 -S A 2
P S 0 -P S 9
/ R E S E T
S D A
S C L
/R D Q S
/R D Q S
/R D Q S
/R D Q S
N U
N U
N U
N U
D 5
D 6
D 7
D 8
/C S
/C S
/C S
/C S
D Q S /D Q S
D Q S /D Q S
D Q S /D Q S
D Q S /D Q S
M
A
B
R D Q S
I / O 0
I / O 1
I / O 2
I / O 3
I / O 4
I / O 5
I / O 6
I / O 7
R D Q S
I / O 0
I / O 1
I / O 2
I / O 3
I / O 4
I / O 5
I / O 6
I / O 7
R D Q S
I / O 0
I / O 1
I / O 2
I / O 3
I / O 4
I / O 5
I / O 6
I / O 7
R D Q S
I / O 0
I / O 1
I / O 2
I / O 3
I / O 4
I / O 5
I / O 6
I / O 7
D M
D M
D M
D M
/R D Q S
/R D Q S
/R D Q S
/R D Q S
N U
N U
N U
N U
S N 0 -S N 1 3
/S N 0 -/S N 1 3
S S 0 -S S 9
/S S 0 -/S S 9
/S 0 -/ C S (D 0 -D 8 )
C K E 0 -> C K E (D 0 -D 8 )
/S 1 -/ C S (D 9 -D 1 7 )
C K E 1 -> C K E (D 9 -D 1 7 )
O D T -> O D T (a ll S D R A M s )
B A 0 -B A 2 (a ll S D R A M s )
A 0 -A 1 5 (a ll S D R A M s )
/R A S (a ll S D R A M s )
/C A S (a ll S D R A M s )
/W E (a ll S D R A M s )
C K , /C K (a ll S D R A M s )
D 1 4
D 1 5
D 1 6
D 1 7
/C S
/C S
/C S
/C S
D Q S /D Q S
D Q S /D Q S
D Q S /D Q S
D Q S /D Q S
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