HMP525F7FFP4C-xx Hynix Semiconductor, HMP525F7FFP4C-xx Datasheet
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HMP525F7FFP4C-xx
Manufacturer Part Number
HMP525F7FFP4C-xx
Description
240pin Fully Buffered DDR2 SDRAM DIMMs
Manufacturer
Hynix Semiconductor
Datasheet
1.HMP525F7FFP4C-XX.pdf
(26 pages)
This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any
responsibility for use of circuits described. No patent licenses are implied.
Rev 1.2 / Feb. 2009
This Hynix’s Fully Buffered DIMM is a high-bandwidth & large capacity channel solution that has a narrow
host interface. Hynix’s FB-DIMM features novel architecture including the Advanced Memory Buffer that
isolates the DDR2 SDRAMs from the channel. This single component located in the front side center of
each DIMM, acts as a repeater and buffer for all signals and commands which are exchanged between the
host controller and the DDR2 SDRAMs including data in and output. The AMB communicates with the host
controller and adjacent DIMMs on a system board using an industry standard Differential Point to Point
Link Interface at 1.5V power.
The AMB also allows buffering of memory traffic to support large memory capacities. All memory control
for the DDR2 SDRAM devices resides in the host, including memory request initiation, timing, refresh,
scrubbing, sparing, configuration access and power management. The AMB interface is responsible for
handling channel and memory requests to and from the local FBDIMM and for forwarding request to other
FBDIMMs on the memory channel.
FEATURES
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240pin Fully Buffered DDR2 SDRAM DIMMs based on 512 Mb F-ver.
240 pin Fully Buffered ECC dual In-Line DDR2 SDRAM Module
JEDEC standard Double Data Rate2 Synchronous DRAMs (DDR2 SDRAMs) with 1.8V +/- 0.1V Power Supply
All inputs and outputs are compatible with SSTL_1.8 interface
Built with 512Mb DDR2 SDRAMs in 60ball FBGA
Host interface and AMB component industry standard compliant
MBIST & IBIST test functions
4 Bank architecture
OCD (Off-Chip Driver Impedance Adjustment)
ODT (On-Die Termination)
Fully differential clock operations (CK & CK)
Programmable Burst Length 4 / 8 with both sequential and interleave mode
Auto refresh and self refresh supported
8192 refresh cycles / 64ms
Serial presence detect with EEPROM
133.35 x 30.35 mm form factor
RoHS compliant
Full Module Heat Spreader
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