HMP525F7FFP4C-xx Hynix Semiconductor, HMP525F7FFP4C-xx Datasheet - Page 4
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HMP525F7FFP4C-xx
Manufacturer Part Number
HMP525F7FFP4C-xx
Description
240pin Fully Buffered DDR2 SDRAM DIMMs
Manufacturer
Hynix Semiconductor
Datasheet
1.HMP525F7FFP4C-XX.pdf
(26 pages)
Rev 1.2 / Feb. 2009
Note:
*: These pin positions are reserved for forwarded clocks to be used in future module implementations
**: These pin positions are reserved for future architecture flexibility
1) The following signals are CRC bits and thus appear out of the normal sequence:
PIN ASSIGNMENT
Pin
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
1
2
3
4
5
6
7
8
9
PN12/ PN12, SN12 / SN12, PN13 / PN13, SN13 / SN13,PS9 / PS9, SS9 / SS9
Name
RESET
RFU**
RFU**
PN13
VID1
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VCC
VCC
VSS
VTT
VCC
VSS
VTT
VSS
VSS
PN0
PN0
VSS
PN1
PN1
VSS
PN2
PN2
VSS
PN3
PN3
VSS
PN4
PN4
VSS
PN5
PN5
VSS
Pin
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
Key
Name
PN13
RFU*
RFU*
PN12
PN12
PN10
PN10
PN11
PN11
PN6
PN6
PN7
PN7
PN8
PN8
PN9
PN9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
PS0
PS0
VSS
PS1
PS1
VSS
PS2
PS2
VSS
PS3
PS3
NC= No Connect, RFU= Reserved for Future Use.
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
Pin
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
Name
RFU**
RFU**
RFU*
RFU*
VDD
VDD
VDD
VDD
VDD
VDD
VDD
SDA
VSS
PS4
PS4
VSS
VSS
VSS
VSS
PS9
PS9
VSS
PS5
PS5
VSS
PS6
PS6
VSS
PS7
PS7
VSS
PS8
PS8
VSS
VSS
VSS
VSS
VTT
SA2
SCL
1
240pin Fully Buffered DDR2 SDRAM DIMMs
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
Pin
DNU/M_Test
Name
RFU**
RFU**
SN13
VID0
VDD
VDD
VDD
VDD
VDD
VDD
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VTT
VSS
VSS
SN0
SN0
VSS
SN1
SN1
VSS
SN2
SN2
VSS
SN3
SN3
VSS
SN4
SN4
VSS
SN5
SN5
VSS
Pin
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
Key
Name
SN13
RFU*
RFU*
SN12
SN12
SN10
SN10
SN11
SN11
SN6
SN6
SN7
SN7
SN8
SN8
SN9
SN9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SS0
SS0
SS1
SS1
SS2
SS2
SS3
SS3
Pin
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
VDDSPD
Name
RFU*
RFU*
RFU*
RFU*
VDD
VDD
VDD
VDD
VDD
VSS
SS4
SS4
VSS
VSS
VSS
VSS
SS9
SS9
VSS
SS5
SS5
VSS
SS6
SS6
VSS
SS7
SS7
VSS
SS8
SS8
VSS
VSS
SCK
SCK
VSS
VSS
VTT
SA0
SA1
4