MT16HTF12864AY-53EC2 Micron, MT16HTF12864AY-53EC2 Datasheet - Page 8

• Manufacturer Part Number: MT16HTF12864AY-53EC2
• Description: DRAM Chip, 512MB, 1GB, 2GB (x64, DR) PC2-3200, PC2-4200, 240-Pin DDR2 SDRAM UDIMM
• Manufacturer: Micron

pdf: 09005aef80f09084, source: 09005aef80f09068
HTF16C64_128_256x64AG.fm - Rev. B 8/04 EN
2. Wait a minimum of 400ns, then issue a PRE-
3. Issue a LOAD MODE command to the EMR(2)
4. Issue a LOAD MODE command to the EMR(3)
5. Issue a LOAD MODE command to the EMR regis-
CHARGE ALL command.
register. (To issue an EMR(2) command, provide
LOW to BA0 and BA2, provide HIGH to BA1.)
register. (To issue an EMR(3) command, provide
HIGH to BA0 and BA1, provide LOW to BA2.)
ter to enable DLL. To issue a DLL ENABLE com-
mand, provide LOW to BA1, BA2, and A0, provide
HIGH to BA0. Bits E7, E8, and E9 must all be set
to 0.
• The voltage difference between any V
ply can not exceed 0.5V. For a minimum of
200µs after stable power and clock (CK, CK#),
apply NOP or DESELECT commands and take
CKE HIGH
PC2-3200, PC2-4200, 240-Pin DDR2 SDRAM UDIMM
DD
sup-
8
10. Issue a LOAD MODE command to the EMR to
11. Issue a LOAD MODE command to the EMR to
12. The DDR2 SDRAM device is now intialized and
6. Issue a LOAD MODE command for DLL Reset.
7. Issue PRECHARGE ALL command.
8. Issue two or more REFRESH commands.
9. Issue a LOAD MODE command with LOW to A8 to
200 cycles of clock input is required to lock the
DLL. (To issue a DLL Reset, provide HIGH to A8
and provide LOW to BA2, BA1 and BA0.) CKE must
be HIGH the entire time.
initialize device operation (i.e., to program oper-
ating parameters without resetting the DLL).
enable OCD default by setting Bits E7, E8, and E9
to 1 and set all other desired parameters.
enable OCD exit by setting Bits E7, E8, and E9 to 0
and set all other desired parameters.
ready for normal operation 200 clocks after DLL
Reset in step 6.
Micron Technology, Inc., reserves the right to change products or specifications without notice.
512MB, 1GB, 2GB (x64, DR)
©2004 Micron Technology, Inc. All rights reserved.