LM3S3768 Luminary Micro, Inc, LM3S3768 Datasheet - Page 538
LM3S3768
Manufacturer Part Number
LM3S3768
Description
Lm3s3768 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S3768.pdf
(755 pages)
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Reset
Type
Univeral Serial Bus (USB) Controller
Type R/W, reset 0x00
538
Host
Device
Bit/Field
7:5
3:0
RO
4
7
0
reserved
RO
Register 17: USB Transmit Dynamic FIFO Sizing (USBTXFIFOSZ), offset 0x062
Register 18: USB Receive Dynamic FIFO Sizing (USBRXFIFOSZ), offset 0x063
These 8-bit registers allow the selected TX/RX endpoint FIFOs to be dynamically sized. USBEPIDX
is used to configure each transmit endpoint's FIFO size.
USB Transmit Dynamic FIFO Sizing (USBTXFIFOSZ)
Base 0x4005.0000
Offset 0x062
6
0
RO
reserved
5
0
Name
SIZE
DPB
DPB
R/W
4
0
R/W
3
0
Type
R/W
R/W
RO
R/W
2
0
SIZE
R/W
Reset
0x00
1
0
0x0
0
Preliminary
R/W
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Double Packet Buffer Support
Defines whether double-packet buffering is supported. When 1,
double-packet buffering is supported. When 0, only single-packet
buffering is supported.
Max Packet Size
Maximum packet size to be allowed for (before any splitting within the
FIFO of bulk/high-bandwidth packets prior to transmission.
If DPB = 0, the FIFO also is this size; if DPB = 1, the FIFO is twice this
size.
Value
0x0
0x1
0x2
0x3
0x4
0x5
0x6
0x7
0x8
0x9-0xF
Packet Size (Bytes)
8
16
32
64
128
256
512
1024
2048
Reserved
June 02, 2008
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