LM3S102 Luminary Micro, Inc, LM3S102 Datasheet - Page 97
LM3S102
Manufacturer Part Number
LM3S102
Description
Lm3s102 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S102.pdf
(330 pages)
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July 6, 2006
Reset
Reset
Type
Type
Bit/Field
Flash Controller Raw Interrupt Status (FCRIS)
Offset 0x00C
RO
RO
31
15
0
0
31:2
1
0
Register 7: Flash Controller Raw Interrupt Status (FCRIS), offset 0x00C
This register indicates that the flash controller has an interrupt condition. An interrupt is only
signaled if the corresponding FCIM register bit is set.
RO
RO
30
14
0
0
reserved
Name
PRIS
ARIS
RO
RO
29
13
0
0
RO
RO
28
12
0
0
Type
RO
RO
RO
RO
RO
27
11
0
0
RO
RO
26
10
0
0
Reset
RO
RO
25
0
9
0
0
0
0
Preliminary
reserved
RO
RO
24
0
8
0
reserved
Description
Reserved bits return an indeterminate value, and should
never be changed.
Programming Raw Interrupt Status
This bit indicates the current state of the programming
cycle. If set, the programming cycle completed; if cleared,
the programming cycle has not completed. Programming
cycles are either write or erase actions generated through
the Flash Memory Control (FMC) register bits (see
page 95).
Access Raw Interrupt Status
This bit indicates if the flash was improperly accessed. If
set, the program tried to access the flash counter to the
policy as set in the Flash Memory Protection Read
Enable (FMPRE) and Flash Memory Protection Program
Enable (FMPPE) registers (see page 91). Otherwise, no
access has tried to improperly access the flash.
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
RO
RO
19
0
3
0
LM3S102 Data Sheet
RO
RO
18
0
2
0
PRIS
RO
RO
17
0
1
0
ARIS
RO
RO
16
0
0
0
97
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